Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5792679 | Method for forming silicon-germanium/Si/silicon dioxide heterostructure using germanium implant | — | 1998-08-11 |
| 5756256 | Silylated photo-resist layer and planarizing method | David A. Vidusek | 1998-05-26 |
| 5726459 | GE-SI SOI MOS transistor and method of fabricating same | Sheng Teng Hsu | 1998-03-10 |
| 5608252 | Semiconductor with implanted dielectric layer having patched pin-holes | — | 1997-03-04 |
| 5589407 | Method of treating silicon to obtain thin, buried insulating layer | Narayanan Meyyappan | 1996-12-31 |
| 5545512 | Method of forming a pattern of silylated planarizing photoresist | — | 1996-08-13 |
| 5514897 | Graded implantation of oxygen and/or nitrogen constituents to define buried isolation region in semiconductor devices | — | 1996-05-07 |
| 5486424 | Silylated photoresist layer and planarizing method | David A. Vidusek | 1996-01-23 |
| 5436175 | Shallow SIMOX processing method using molecular ion implantation | Narayanan Meyyappan | 1995-07-25 |
| 5395771 | Graded implantation of oxygen and/or nitrogen constituents to define buried isolation region in semiconductor devices | — | 1995-03-07 |
| 5278077 | Pin-hole patch method for implanted dielectric layer | — | 1994-01-11 |