Issued Patents All Time
Showing 326–350 of 400 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6140189 | Method for fabricating a LOCOS MOS device for ESD protection | Katsumasa Fujii, Hidechika Kawazoe, Jong-Jan Lee | 2000-10-31 |
| 6133106 | Fabrication of a planar MOSFET with raised source/drain by chemical mechanical polishing and nitride replacement | David R. Evans | 2000-10-17 |
| 6117691 | Method of making a single transistor ferroelectric memory cell with asymmetrical ferroelectric polarization | Jong-Jan Lee | 2000-09-12 |
| 6114197 | Method of forming fully depleted SIMOX CMOS having electrostatic discharge protection | — | 2000-09-05 |
| 6090963 | Alkene ligand precursor and synthesis method | Wei-Wei Zhuang, Tue Nguyen, Robert Barrowcliff, David R. Evans | 2000-07-18 |
| 6080612 | Method of forming an ultra-thin SOI electrostatic discharge protection device | — | 2000-06-27 |
| 6071782 | Partial silicidation method to form shallow source/drain junctions | Jer-Shen Maa, Chien-Hsiung Peng | 2000-06-06 |
| 6048740 | Ferroelectric nonvolatile transistor and method of making same | Jer-Shen Maa, Fengyang Zhang, Tingkai Li | 2000-04-11 |
| 6048738 | Method of making ferroelectric memory cell for VLSI RAM array | Jong-Jan Lee | 2000-04-11 |
| 6043164 | Method for transferring a multi-level photoresist pattern | Tue Nguyen, Jer-Shen Maa, Bruce D. Ulrich, Chien-Hsiung Peng | 2000-03-28 |
| 6023102 | Low resistance contact between circuit metal levels | Tue Nguyen | 2000-02-08 |
| 6018171 | Shallow junction ferroelectric memory cell having a laterally extending p-n junction and method of making the same | Jong-Jan Lee, Chien-Hsiung Peng | 2000-01-25 |
| 6015918 | Allyl-derived precursor and synthesis method | Wei-Wei Zhuang, Tue Nguyen, Greg Michael Stecker, David R. Evans | 2000-01-18 |
| 6011285 | C-axis oriented thin film ferroelectric transistor memory cell and method of making the same | Jong-Jan Lee, Chien-Hsiung Peng | 2000-01-04 |
| 6002176 | Differential copper deposition on integrated circuit surfaces | Tue Nguyen, Lawrence J. Charneski | 1999-12-14 |
| 5994571 | Substituted ethylene precursor and synthesis method | Wei-Wei Zhuang, Tue Nguyen, Lawrence J. Charneski, David R. Evans | 1999-11-30 |
| 5989965 | Nitride overhang structures for the silicidation of transistor electrodes with shallow junction | Jer-Shen Maa, Chien-Hsiung Peng | 1999-11-23 |
| 5962884 | Single transistor ferroelectric memory cell with asymmetrical ferroelectric polarization and method of making the same | Jong-Jan Lee | 1999-10-05 |
| 5942776 | Shallow junction ferroelectric memory cell and method of making the same | Jong-Jan Lee | 1999-08-24 |
| 5939334 | System and method of selectively cleaning copper substrate surfaces, in-situ, to remove copper oxides | Tue Nguyen, Lawrence J. Charneski, David R. Evans | 1999-08-17 |
| 5932904 | Two transistor ferroelectric memory cell | Jong-Jan Lee | 1999-08-03 |
| 5932913 | MOS transistor with controlled shallow source/drain junction, source/drain strap portions, and source/drain electrodes on field insulation layers | — | 1999-08-03 |
| 5915199 | Method for manufacturing a CMOS self-aligned strapped interconnection | — | 1999-06-22 |
| 5910673 | Locos MOS device for ESD protection | Katsumasa Fujii, Hidechika Kawazoe, Jong-Jan Lee | 1999-06-08 |
| 5907762 | Method of manufacture of single transistor ferroelectric memory cell using chemical-mechanical polishing | David R. Evans, Jong-Jan Lee | 1999-05-25 |