Issued Patents All Time
Showing 25 most recent of 124 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12431359 | Semiconductor package electrical contacts and related methods | Yusheng LIN, Michael J. Seddon, Francis J. Carney, Eiji KUROSE | 2025-09-30 |
| 12322632 | Substrate alignment systems and related methods | Michael J. Seddon | 2025-06-03 |
| 12261084 | Fan-out wafer level packaging of semiconductor devices | George Chang, Yusheng LIN, Gordon M. Grivna | 2025-03-25 |
| 12230502 | Semiconductor package stress balance structures and related methods | Yusheng LIN, Michael J. Seddon, Francis J. Carney, Eiji KUROSE | 2025-02-18 |
| 12199041 | Thinned semiconductor package and related methods | Yusheng LIN, Francis J. Carney | 2025-01-14 |
| 12154877 | Semiconductor wafer and method of ball drop on thin wafer with edge support ring | Michael J. Seddon, Kazuhiro Saito | 2024-11-26 |
| 12040295 | Semiconductor device with backmetal and related methods | Michael J. Seddon, Kazuo Okada, Hideaki Yoshimi, Naoyuki Yomoda, Yusheng LIN | 2024-07-16 |
| 11735497 | Integrated passive device and fabrication method using a last through-substrate via | Hideyuki Inotsume, Kazuo Okada | 2023-08-22 |
| 11728424 | Isolation in a semiconductor device | Yusheng LIN, Kazuo Okada, Hideaki Yoshimi, Shunsuke YASUDA | 2023-08-15 |
| 11676863 | Structures for aligning a semiconductor wafer for singulation | Michael J. Seddon | 2023-06-13 |
| 11646267 | Thinned semiconductor package and related methods | Yusheng LIN, Francis J. Carney | 2023-05-09 |
| 11508579 | Backside metal photolithographic patterning die singulation systems and related methods | Michael J. Seddon | 2022-11-22 |
| 11393692 | Semiconductor package electrical contact structures and related methods | Francis J. Carney, Michael J. Seddon, Yusheng LIN, Eiji KUROSE | 2022-07-19 |
| 11387130 | Substrate alignment systems and related methods | Michael J. Seddon | 2022-07-12 |
| 11367619 | Semiconductor package electrical contacts and related methods | Yusheng LIN, Michael J. Seddon, Francis J. Carney, Eiji KUROSE | 2022-06-21 |
| 11289381 | Methods of aligning a semiconductor wafer for singulation | Michael J. Seddon | 2022-03-29 |
| 11264264 | Solder bump formation using wafer with ring | Noboru Okubo, Yusheng LIN | 2022-03-01 |
| 11257759 | Isolation in a semiconductor device | Francis J. Carney, Yusheng LIN | 2022-02-22 |
| 11164835 | Semiconductor wafer and method of ball drop on thin wafer with edge support ring | Michael J. Seddon, Kazuhiro Saito | 2021-11-02 |
| 11114402 | Semiconductor device with backmetal and related methods | Michael J. Seddon, Kazuo Okada, Hideaki Yoshimi, Naoyuki Yomoda, Yusheng LIN | 2021-09-07 |
| 11075103 | Backside wafer alignment methods | Michael J. Seddon | 2021-07-27 |
| 11043420 | Fan-out wafer level packaging of semiconductor devices | George Chang, Yusheng LIN, Gordon M. Grivna | 2021-06-22 |
| 11032904 | Interposer substrate and circuit module | Hirokazu Yazaki, Keito Yonemori, Takanori Tsuchiya, Koji KAMADA | 2021-06-08 |
| 10896819 | Backside metal photolithographic patterning die singulation systems and related methods | Michael J. Seddon | 2021-01-19 |
| 10825731 | Methods of aligning a semiconductor wafer for singulation | Michael J. Seddon | 2020-11-03 |