Issued Patents All Time
Showing 26–50 of 116 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11526395 | Write buffer management | Wei Wang, Jiangli Zhu, Ying Yu Tai, Ning Chen, Cheng Yuan Wu | 2022-12-13 |
| 11520491 | Parity protection in non-volatile memory | Xiangang Luo | 2022-12-06 |
| 11455194 | Management of unmapped allocation units of a memory sub-system | Tingjun Xie, Zhenlei Shen | 2022-09-27 |
| 11438012 | Failure-tolerant error correction layout for memory sub-systems | Wei-Cheng Wu, Zhenlei Shen | 2022-09-06 |
| 11430529 | Capacitance coupling parameter estimation in flash memories | Meysam Asadi, Erich F. Haratsch | 2022-08-30 |
| 11410743 | Self-adaptive read voltage adjustment using directional error statistics for memories with time-varying error rates | Tingjun Xie | 2022-08-09 |
| 11404141 | Preemptive read refresh in memories with time-varying error rates | Tingjun Xie | 2022-08-02 |
| 11394403 | Error correction based on rate adaptive low density parity check (LDPC) codes with flexible column weights in the parity check matrices | Eyal En Gad, Sivagnanam Parthasarathy, Mustafa N. Kaynak, Yoav Weinberg | 2022-07-19 |
| 11374592 | Iterative error correction with adjustable parameters after a threshold number of iterations | Eyal En Gad, Sivagnanam Parthasarathy, Yoav Weinberg | 2022-06-28 |
| 11341046 | Layer interleaving in multi-layered memory | Mikai Chen, Charles See Yeung Kwong | 2022-05-24 |
| 11327884 | Self-seeded randomizer for data randomization in flash memory | Jianmin Huang | 2022-05-10 |
| 11281533 | Hybrid iterative error correcting and redundancy decoding operations for memory sub-systems | Ying Yu Tai, Jiangli Zhu | 2022-03-22 |
| 11256617 | Metadata aware copyback for memory devices | Jianmin Huang | 2022-02-22 |
| 11256429 | Adjustment of a pre-read operation based on an operating temperature | Zhenlei Shen, Tingjun Xie, Jiangli Zhu | 2022-02-22 |
| 11204828 | Management of corruptive read in memory systems | Tingjun Xie | 2021-12-21 |
| 11146291 | Configuring iterative error correction parameters using criteria from previous iterations | Eyal En Gad, Sivagnanam Parthasarathy, Yoav Weinberg | 2021-10-12 |
| 11107550 | Self-adaptive read voltage adjustment using boundary error statistics for memories with time-varying error rates | Tingjun Xie | 2021-08-31 |
| 11056166 | Performing a refresh operation based on a characteristic of a memory sub-system | Tingjun Xie, Seungjune Jeon, Zhenlei Shen, Charles See Yeung Kwong | 2021-07-06 |
| 11037637 | Defect detection in memories with time-varying bit error rate | Sai Krishna Mylavarapu, Zhenlei Shen, Tingjun Xie, Charles See Yeung Kwong | 2021-06-15 |
| 11024396 | Reduction or elimination of a latency penalty associated with adjusting read thresholds for non-volatile memory | Erich F. Haratsch, Sundararajan Sankaranarayanan | 2021-06-01 |
| 11023172 | Selecting read voltage using write transaction data | Tingjun Xie | 2021-06-01 |
| 11023171 | Performing a refresh operation based on a write to read time difference | Tingjun Xie | 2021-06-01 |
| 11004534 | Preemptive read refresh in memories with time-varying error rates | Tingjun Xie | 2021-05-11 |
| 10892029 | Self-adaptive read voltage adjustment using directional error statistics for memories with time-varying error rates | Tingjun Xie | 2021-01-12 |
| 10877835 | Write buffer management | Wei Wang, Jiangli Zhu, Ying Yu Tai, Ning Chen, Cheng Yuan Wu | 2020-12-29 |