Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12135876 | Memory systems having controllers embedded in packages of integrated circuit memory | Samir Mittal, Gurpreet Anand, Ying Yu Tai | 2024-11-05 |
| 11869618 | Memory sub-system including an in-package sequencer to perform error correction and memory testing operations | Samir Mittal, Ying Yu Tai, Jiangli Zhu | 2024-01-09 |
| 11675714 | Memory sub-system including an in package sequencer separate from a controller | Samir Mittal, Ying Yu Tai | 2023-06-13 |
| 11669275 | Controller with distributed sequencer components | Jiangli Zhu, Ying Yu Tai | 2023-06-06 |
| 11567817 | Providing bandwidth expansion for a memory sub-system including a sequencer separate from a controller | Samir Mittal, Ying Yu Tai | 2023-01-31 |
| 11526395 | Write buffer management | Wei Wang, Jiangli Zhu, Ying Yu Tai, Ning Chen, Zhengang Chen | 2022-12-13 |
| 11080210 | Memory sub-system including an in package sequencer separate from a controller | Samir Mittal, Ying Yu Tai | 2021-08-03 |
| 11061751 | Providing bandwidth expansion for a memory sub-system including a sequencer separate from a controller | Samir Mittal, Ying Yu Tai | 2021-07-13 |
| 10991445 | Memory sub-system including an in-package sequencer to perform error correction and memory testing operations | Samir Mittal, Ying Yu Tai, Jiangli Zhu | 2021-04-27 |
| 10983724 | Controller with distributed sequencer components | Jiangli Zhu, Ying Yu Tai | 2021-04-20 |
| 10877835 | Write buffer management | Wei Wang, Jiangli Zhu, Ying Yu Tai, Ning Chen, Zhengang Chen | 2020-12-29 |
| 7822040 | Method for increasing network transmission efficiency by increasing a data updating rate of a memory | Cheng-Shian Shiao | 2010-10-26 |
| 7539913 | Systems and methods for chip testing | Chien-Cheng Chang | 2009-05-26 |
| 7451240 | Method and related circuit for increasing network transmission efficiency by increasing a data updating rate of a memory | Cheng-Shian Shiao | 2008-11-11 |
| 7242692 | Method and device for coordinating packet transmission order | Stone Wei, Chih-Hsien Weng | 2007-07-10 |
| 6993670 | Method of configuring a computer system capable of being woken up on LAN | Chih-Hsien Weng, Wen-Hsu Huang | 2006-01-31 |
| 6859026 | Method and device for verifying frequency of clock signal | Chen-Hua Hsi, Chih-Hsien Weng | 2005-02-22 |
| 6646480 | Glitchless clock output circuit and the method for the same | Chih-Hsien Weng, Chen-Hua Hsi | 2003-11-11 |