Issued Patents All Time
Showing 26–50 of 62 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8045412 | Multi-stage parallel data transfer | Yong Lu, Hai Li, Andrew John Carter, Daniel S. Reed | 2011-10-25 |
| 8040713 | Bit set modes for a resistive sense memory cell array | Yiran Chen, Daniel S. Reed, Yong Lu, Hai Li, Rod V. Bowman | 2011-10-18 |
| 8009458 | Asymmetric write current compensation using gate overdrive for resistive sense memory cells | Yong Lu | 2011-08-30 |
| 8009457 | Write current compensation using word line boosting circuitry | Hai Li, Yiran Chen, Henry Huang, Ran Wang | 2011-08-30 |
| 8004872 | Floating source line architecture for non-volatile memory | Chulmin Jung, Yong Lu | 2011-08-23 |
| 7974121 | Write current compensation using word line boosting circuitry | Hai Li, Yiran Chen, Henry Huang, Ran Wang | 2011-07-05 |
| 7969812 | Semiconductor control line address decoding circuit | Chulmin Jung, Dadi Setiadi, YoungPil Kim, Hyung-Kyu Lee | 2011-06-28 |
| 7965565 | Current cancellation for non-volatile memory | Chulmin Jung, Insik Jin, YoungPil Kim, Yong Lu, Andrew John Carter | 2011-06-21 |
| 7948045 | Magnet-assisted transistor devices | Yang Li, Insik Jin, Song S. Xue, Shuiyuan Huang, Michael Xuefei Tang | 2011-05-24 |
| 7944729 | Simultaneously writing multiple addressable blocks of user data to a resistive sense memory cell array | Yiran Chen, Daniel S. Reed, Yong Lu, Hai Li, Rod V. Bowman | 2011-05-17 |
| 7944731 | Resistive sense memory array with partial block update capability | Yiran Chen, Daniel S. Reed, Yong Lu, Hai Li | 2011-05-17 |
| 7936625 | Pipeline sensing using voltage storage elements to read non-volatile memory cells | Yiran Chen, Hai Li, KangYong Kim, Henry Huang | 2011-05-03 |
| 7936622 | Defective bit scheme for multi-layer integrated memory device | Hai Li, Yiran Chen, Dadi Setiadi, Brian Lee | 2011-05-03 |
| 7936592 | Non-volatile memory cell with precessional switching | Xiaobin Wang, Yong Lu, Haiwen Xi, Yuankai Zheng, Yiran Chen +3 more | 2011-05-03 |
| 7916528 | Predictive thermal preconditioning and timing control for non-volatile memory cells | Yiran Chen, Hai Li, Dimitar V. Dimitrov, Alan Xuguang Wang, Xiaobin Wang | 2011-03-29 |
| 7916515 | Non-volatile memory read/write verify | Hai Li, Yiran Chen, Alan Xuguang Wang | 2011-03-29 |
| 7894250 | Stuck-at defect condition repair for a non-volatile memory cell | Alan Xuguang Wang, Xiaobin Wang, Dimitar V. Dimitrov, Hai Li, Haiwen Xi | 2011-02-22 |
| 7881095 | Asymmetric write current compensation using gate overdrive for resistive sense memory cells | Yong Lu | 2011-02-01 |
| 7881094 | Voltage reference generation for resistive sense memory cells | Yiran Chen, Hai Li, KangYong Kim, Henry Huang | 2011-02-01 |
| 7855923 | Write current compensation using word line boosting circuitry | Hai Li, Yiran Chen, Henry Huang, Ran Wang | 2010-12-21 |
| 7852665 | Memory cell with proportional current self-reference sensing | Yiran Chen, Hai Li, Wenzhong Zhu, Xiaobin Wang, Ran Wang | 2010-12-14 |
| 7830693 | NAND based resistive sense memory cell architecture | Haiwen Xi, Antoine Khoueir, Song S. Xue | 2010-11-09 |
| 7830700 | Resistive sense memory array with partial block update capability | Yiran Chen, Daniel S. Reed, Yong Lu, Hai Li | 2010-11-09 |
| 7830708 | Compensating for variations in memory cell programmed state distributions | Chulmin Jung, Yong Lu | 2010-11-09 |
| 7427514 | Passivated magneto-resistive bit structure and passivation method therefor | Lonny Berg, William Larson, Shaoping Li, Theodore Zhu, Joel Drewes | 2008-09-23 |