Issued Patents All Time
Showing 26–50 of 52 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9711530 | Locally-trap-characteristic-enhanced charge trap layer for three-dimensional memory structures | Yusuke Ikawa, Eisuke Takii | 2017-07-18 |
| 9666281 | Three-dimensional P-I-N memory device and method reading thereof using hole current detection | — | 2017-05-30 |
| 9601508 | Blocking oxide in memory opening integration scheme for three-dimensional memory structure | Jongsun Sel, Chan Park, Atsushi Suyama, Frank Yu, Hiroyuki Ogawa +6 more | 2017-03-21 |
| 9589839 | Method of reducing control gate electrode curvature in three-dimensional memory devices | Yusuke Ikawa, Eisuke Takii, Kengo Kajiwara, Seiji Shimabukuro, Akira Matsudaira +1 more | 2017-03-07 |
| 9443866 | Mid-tunneling dielectric band gap modification for enhanced data retention in a three-dimensional semiconductor device | — | 2016-09-13 |
| 9356043 | Three-dimensional memory devices containing memory stack structures with position-independent threshold voltage | Shinsuke Yada | 2016-05-31 |
| 8575969 | Semiconductor device having differential pair transistors with a switchable tail current | — | 2013-11-05 |
| 8084279 | Method of manufacturing semiconductor device that uses both a normal photomask and a phase shift mask for defining interconnect patterns | Tatsuo Kasaoka, Noboru Mori, Kazunobu Miki | 2011-12-27 |
| 7696081 | Method of manufacturing semiconductor device that uses both a normal photomask and a phase shift mask for defining interconnect patterns | Tatsuo Kasaoka, Noboru Mori, Kazunobu Miki | 2010-04-13 |
| 7358548 | Semiconductor integrated circuit having layout in which buffers or protection circuits are arranged in concentrated manner | Tadashi Nakamura, Yutaka Takikawa | 2008-04-15 |
| 6970385 | Non-volatile semiconductor memory device suppressing write-back fault | — | 2005-11-29 |
| 6711060 | Non-volatile semiconductor memory and methods of driving, operating, and manufacturing this memory | — | 2004-03-23 |
| 6667524 | Semiconductor device with a plurality of semiconductor elements | — | 2003-12-23 |
| 6566678 | Semiconductor device having a solid-state image sensor | Atsushi Maeda | 2003-05-20 |
| 6563165 | Non-volatile semiconductor memory device and method for producing the same | Hirotada Kuriyama | 2003-05-13 |
| 6466484 | Nonvolatile semiconductor memory device capable of suppressing reduction of bit line potential in write-back operation and erase method | Susumu Takeuchi, Makoto Yamamoto, Kunio Tani, Yukio Nakamoto, Tomohisa Iba | 2002-10-15 |
| 6445617 | Non-volatile semiconductor memory and methods of driving, operating, and manufacturing this memory | — | 2002-09-03 |
| 6356480 | Nonvolatile semiconductor memory device capable of suppressing reduction of bit line potential in write-back operation and erase method | Susumu Takeuchi, Makoto Yamamoto, Kunio Tani, Yukio Nakamoto, Tomohisa Iba | 2002-03-12 |
| 6172397 | Non-volatile semiconductor memory device | Takahiro Oonakado, Hiroshi Onoda, Natsuo Ajika | 2001-01-09 |
| 6048770 | Nonvolatile semiconductor memory device and method of manufacturing the same | — | 2000-04-11 |
| 5877524 | Non-volatile semiconductor memory device | Takahiro Oonakado, Hiroshi Onoda, Natsuo Ajika | 1999-03-02 |
| 5691560 | Nonvolatile semiconductor memory device and method of manufacturing the same | — | 1997-11-25 |
| 5621689 | Nonvolatile semiconductor memory device having controlled charge pump load | Natsuo Ajika | 1997-04-15 |
| 5302543 | Method of making a charge coupled device | — | 1994-04-12 |
| 5238864 | Method of making solid-state imaging device | Shigeto Maegawa, Hidekazu Yamamoto | 1993-08-24 |