Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10936415 | Error correction scheme in flash memory | Piyush Sagdeo, Gautam Dusija, Vidhu Gupta | 2021-03-02 |
| 10790031 | System handling for first read read disturb | Piyush Sagdeo, Sourabh Sankule, Pitamber Shukla, Anubhav Khandelwal, Mohan Dunga +1 more | 2020-09-29 |
| 10734079 | Sub block mode read scrub design for non-volatile memory | Srinivasan Seetharaman, Sourabh Sankule, Piyush Sagdeo, Gautam Dusija | 2020-08-04 |
| 10691372 | Transistor threshold voltage maintenance in 3D memory | Srinivasan Seetharaman, Piyush Sagdeo, Sourabh Sankule | 2020-06-23 |
| 10635585 | On-chip copy with data folding in three-dimensional non-volatile memory array | Abhilash Ravi Kashyap, Gautam Dusija, Deepak Raghu | 2020-04-28 |
| 10102920 | Memory system with a weighted read retry table | Philip Reusswig, Deepak Raghu, Zelei Guo | 2018-10-16 |
| 10068656 | Non-volatile memory with multi-pass programming | Deepanshu Dutta, Sarath Puthenthermadam | 2018-09-04 |
| 10026483 | Program temperature aware data scrub | Grishma Shah, Philip Reusswig, Nian Niles Yang | 2018-07-17 |
| 10007311 | Adaptive temperature and memory parameter throttling | Deepak Raghu, Pao-Ling Koh, Philip Reusswig, Jun Wan, Yan Li | 2018-06-26 |
| 9837146 | Memory system temperature management | Nian Niles Yang | 2017-12-05 |
| 9792998 | System and method for erase detection before programming of a storage device | Nian Niles Yang, Grishma Shah | 2017-10-17 |
| 9711231 | System solution for first read issue using time dependent read voltages | Philip Reusswig, Nian Niles Yang, Grishma Shah, Abuzer Dogan, Biswajit Ray +3 more | 2017-07-18 |