Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12360850 | System recovery during CGI-WL defect | Mahim Raj Gupta, Ramkumar Subramanian, Lior Avital | 2025-07-15 |
| 11984181 | Systems and methods for evaluating integrity of adjacent sub blocks of data storage apparatuses | Srinivasan Seetharaman, Sourabh Sankule | 2024-05-14 |
| 11704190 | UECC failure handling method | Ramkumar Subramanian, Mahim Raj Gupta | 2023-07-18 |
| 10936415 | Error correction scheme in flash memory | Chris Yip, Gautam Dusija, Vidhu Gupta | 2021-03-02 |
| 10790031 | System handling for first read read disturb | Chris Yip, Sourabh Sankule, Pitamber Shukla, Anubhav Khandelwal, Mohan Dunga +1 more | 2020-09-29 |
| 10734079 | Sub block mode read scrub design for non-volatile memory | Srinivasan Seetharaman, Sourabh Sankule, Gautam Dusija, Chris Yip | 2020-08-04 |
| 10691372 | Transistor threshold voltage maintenance in 3D memory | Srinivasan Seetharaman, Sourabh Sankule, Chris Yip | 2020-06-23 |
| 10235294 | Pre-read voltage pulse for first read error handling | Ching-Huang Lu, Swaroop Kaza | 2019-03-19 |
| 9804922 | Partial bad block detection and re-use using EPWR for block based architectures | Mrinal Kochar, Abhijeet Bhalerao, Derek McAuley | 2017-10-31 |
| 9235470 | Adaptive EPWR (enhanced post write read) scheduling | Abhijeet Bhalerao, Mrinal Kochar | 2016-01-12 |
| 9195587 | Enhanced dynamic read process with single-level cell segmentation | Mrinal Kochar, Anubhav Khandelwal | 2015-11-24 |