Issued Patents All Time
Showing 26–43 of 43 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10297673 | Methods of forming semiconductor devices including conductive contacts on source/drains | Jorge A. Kittl, Ganesh Hegde, Borna J. Obradovic, Mark S. Rodder | 2019-05-21 |
| 10164121 | Stacked independently contacted field effect transistor having electrically separated first and second gates | Ryan M. Hatcher, Borna J. Obradovic, Joon Goo Hong | 2018-12-25 |
| 10153368 | Unipolar complementary logic | Ryan M. Hatcher, Chris Bowen | 2018-12-11 |
| 10026751 | Semiconductor device including a repeater/buffer at higher metal routing layers and methods of manufacturing the same | Titash Rakshit, Borna J. Obradovic, Wei-E Wang, Ryan M. Hatcher, Mark S. Rodder | 2018-07-17 |
| 9929180 | Semiconductor device | Raheel Azmat, Chulhong Park, Kwanyoung Chun | 2018-03-27 |
| 9768062 | Method for forming low parasitic capacitance source and drain contacts | Jorge A. Kittl, David Seo, Kota OIKAWA, Kim Changhwa, Mark S. Rodder | 2017-09-19 |
| 9728502 | Metal oxysilicate diffusion barriers for damascene metallization with low RC delays and methods for forming the same | Ganesh Hegde, Mark S. Rodder, Chris Bowen | 2017-08-08 |
| 9691860 | Methods of forming defect-free SRB onto lattice-mismatched substrates and defect-free fins on insulators | Wei-E Wang, Mark S. Rodder | 2017-06-27 |
| 9685564 | Gate-all-around field effect transistors with horizontal nanosheet conductive channel structures for MOL/inter-channel spacing and related cell architectures | Mark S. Rodder, Joon Goo Hong, Titash Rakshit | 2017-06-20 |
| 9659871 | Semiconductor device | Raheel Azmat, Chulhong Park, Kwanyoung Chun | 2017-05-23 |
| 9570395 | Semiconductor device having buried power rail | Joon Goo Hong, Mark S. Rodder | 2017-02-14 |
| 9490263 | Semiconductor device and method of forming the same | Sooyeon Jeon, Chulhong Park, Kwanyoung Chun, Yusun Lee, Hyun Jong Lee | 2016-11-08 |
| 9490323 | Nanosheet FETs with stacked nanosheets having smaller horizontal spacing than vertical spacing for large effective width | Mark S. Rodder, Borna J. Obradovic | 2016-11-08 |
| 9466669 | Multiple channel length finFETs with same physical gate length | Mark S. Rodder, Borna J. Obradovic | 2016-10-11 |
| 9443851 | Semiconductor devices including finFETs and local interconnect layers and methods of fabricating the same | Raheel Azmat | 2016-09-13 |
| 9324715 | Flip-flop layout architecture implementation for semiconductor device | Raheel Azmat, Chulhong Park, Kwanyoung Chun | 2016-04-26 |
| 9287357 | Integrated circuits with Si and non-Si nanosheet FET co-integration with low band-to-band tunneling and methods of fabricating the same | Mark S. Rodder, Borna J. Obradovic, Dharmendar Reddy Palle, Robert C. Bowen | 2016-03-15 |
| 8963210 | Standard cell for integrated circuit | Rohit Gupta, Mitesh Goyal, Olivier Menut | 2015-02-24 |