Issued Patents All Time
Showing 25 most recent of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12271068 | Heterogeneous integration and electro-optic modulation of III-nitride photonics on a silicon photonic platform | Moe D. Soltani | 2025-04-08 |
| 11784248 | Group III-V semiconductor structures having crystalline regrowth layers and methods for forming such structures | Jeffrey R. LaRoche, Kelly P. Ip, Eduardo M. Chumbes | 2023-10-10 |
| 11754865 | Hetergenous integration and electro-optic modulation of III-nitride photonics on a silicon photonic platform | Moe D. Soltani | 2023-09-12 |
| 11747704 | Integration of electronics with lithium niobate photonics | Moe D. Soltani, Jeffrey R. LaRoche | 2023-09-05 |
| 11515410 | Group III-V semiconductor structures having crystalline regrowth layers and methods for forming such structures | Jeffrey R. LaRoche, Kelly P. Ip, Eduardo M. Chumbes | 2022-11-29 |
| 11340512 | Integration of electronics with Lithium Niobate photonics | Moe D. Soltani, Jeffrey R. LaRoche | 2022-05-24 |
| 11239326 | Electrode structure for field effect transistor | Jeffrey R. LaRoche, Kelly P. Ip, Kamal Tabatabaie Alavi | 2022-02-01 |
| 11177216 | Nitride structures having low capacitance gate contacts integrated with copper damascene structures | Jeffrey R. LaRoche, Eduardo M. Chumbes, Kelly P. Ip | 2021-11-16 |
| 10930742 | Wafer structure with mode suppression | Hooman Kazemi, Mark J. Rosker, Shane A. O'Connor, Emily Elswick | 2021-02-23 |
| 10224285 | Nitride structure having gold-free contact and methods for forming such structures | Jeffrey R. LaRoche, Eduardo M. Chumbes, Kelly P. Ip | 2019-03-05 |
| 10096550 | Nitride structure having gold-free contact and methods for forming such structures | Jeffrey R. LaRoche, Eduardo M. Chumbes, Kelly P. Ip | 2018-10-09 |
| 9761445 | Methods and structures for forming microstrip transmission lines on thin silicon carbide on insulator (SICOI) wafers | Jeffrey R. LaRoche, Kelly P. Ip | 2017-09-12 |
| 9478508 | Microwave integrated circuit (MMIC) damascene electrical interconnect for microwave energy transmission | Jeffrey R. LaRoche, John P. Bettencourt, Kelly P. Ip | 2016-10-25 |
| 9231064 | Double heterojunction group III-nitride structures | Shahed Reza, Eduardo M. Chumbes, Gerhard Sollner | 2016-01-05 |
| 8575666 | Method and structure having monolithic heterogeneous integration of compound semiconductors with elemental semiconductor | Jeffrey R. LaRoche, William E. Hoke | 2013-11-05 |
| RE44303 | Passivation layer for a circuit device and method of manufacture | John M. Bedinger, Michael A. Moore, Robert B. Hallock, Kamal Tabatabaie | 2013-06-18 |
| 8466555 | Gold-free ohmic contacts | Ram V. Chelakara, Jeffrey R. LaRoche | 2013-06-18 |
| 7902083 | Passivation layer for a circuit device and method of manufacture | John M. Bedinger, Michael A. Moore, Robert B. Hallock, Kamal Tabatabaie Alavi | 2011-03-08 |
| 7767589 | Passivation layer for a circuit device and method of manufacture | John M. Bedinger, Michael A. Moore, Robert B. Hallock, Kamal Tabatabaie Alavi | 2010-08-03 |
| 7387958 | MMIC having back-side multi-layer signal routing | Christopher P. McCarroll, Jerome H. Pozgay, Steven M. Lardizabal, Michael G. Adlerstein | 2008-06-17 |
| 6175287 | Direct backside interconnect for multiple chip assemblies | James L. Lampen, Paul Setzco, Michael G. Kizner, John P. Wendler | 2001-01-16 |
| 5343071 | Semiconductor structures having dual surface via holes | John Huang | 1994-08-30 |
| 4970578 | Selective backside plating of GaAs monolithic microwave integrated circuits | Elsa K. Tong | 1990-11-13 |
| 4968637 | Method of manufacture TiW alignment mark and implant mask | Robert L. Mozzi | 1990-11-06 |
| 4927784 | Simultaneous formation of via hole and tube structures for GaAs monolithic microwave integrated circuits | Mark S. Durschlag | 1990-05-22 |