Issued Patents All Time
Showing 26–45 of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6868474 | High performance cost optimized memory | Richard M. Barth, Frederick A. Ware, Donald C. Stark, Craig E. Hampel, Paul G. Davis +2 more | 2005-03-15 |
| 6687780 | Expandable slave device system | Bruno W. Garlepp, Richard M. Barth, Kevin S. Donnelly, Ely Tsern, Craig E. Hampel +4 more | 2004-02-03 |
| 6671836 | Method and apparatus for testing memory | Lawrence Lai, Victor Lee | 2003-12-30 |
| 6509756 | Method and apparatus for low capacitance, high output impedance driver | Leung Yu, Roxanne Vu, Benedict Lau, Huy M. Nguyen | 2003-01-21 |
| 6401167 | High performance cost optimized memory | Richard M. Barth, Frederick A. Ware, Donald C. Stark, Craig E. Hampel, Paul G. Davis +2 more | 2002-06-04 |
| 6330193 | Method and apparatus for low capacitance, high output impedance driver | Leung Yu, Roxanne Vu, Benedict Lau, Huy M. Nguyen | 2001-12-11 |
| 6308232 | Electronically moveable terminator and method for using same in a memory system | — | 2001-10-23 |
| 6266730 | High-frequency bus system | Donald V. Perino, Billy Wayne Garrett, Jr., Haw-Jyh Liaw, David Nguyen, Srinivas Nimmagadda +1 more | 2001-07-24 |
| 6075730 | High performance cost optimized memory with delayed memory writes | Richard M. Barth, Frederick A. Ware, Donald C. Stark, Craig E. Hampel, Paul G. Davis +5 more | 2000-06-13 |
| 6067594 | High frequency bus system | Donald V. Perino, Billy Wayne Garrett, Jr., Haw-Jyh Liaw, David Nguyen, Srinivas Nimmagadda +1 more | 2000-05-23 |
| 6009487 | Method and apparatus for setting a current of an output driver for the high speed bus | Paul G. Davis, Pradeep Batra, John B. Dillon, Karnamadakala Krishnamohan | 1999-12-28 |
| 5908333 | Connector with integral transmission line bus | Donald V. Perino, John B. Dillon | 1999-06-01 |
| 5844913 | Current mode interface circuitry for an IC test device | Joseph H. Hassoun | 1998-12-01 |
| 5446696 | Method and apparatus for implementing refresh in a synchronous DRAM system | Frederick A. Ware, John B. Dillon, Michael Farmwald, Mark A. Horowitz, Matthew Murdy Griffin | 1995-08-29 |
| 5432823 | Method and circuitry for minimizing clock-data skew in a bus system | Mark A. Horowitz, Richard M. Barth, Winston Lee, Wingyu Leung, Paul Michael Farmwald | 1995-07-11 |
| 5357195 | Testing set up and hold input timing parameters of high speed integrated circuit devices | Mark A. Horowitz | 1994-10-18 |
| 5337285 | Method and apparatus for power control in devices | Frederick A. Ware, John B. Dillon, Matthew Murdy Griffin, Richard M. Barth, Mark A. Horowitz | 1994-08-09 |
| 5325053 | Apparatus for testing timing parameters of high speed integrated circuit devices | Mark A. Horowitz | 1994-06-28 |
| 5268639 | Testing timing parameters of high speed integrated circuit devices | Mark A. Horowitz | 1993-12-07 |
| 5254883 | Electrical current source circuitry for a bus | Mark A. Horowitz, Wingyu Leung | 1993-10-19 |