Issued Patents All Time
Showing 76–96 of 96 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7084710 | Digital expander apparatus and method for generating multiple analog control signals particularly useful for controlling an oscillator | Yunteng Huang, David R. Welland | 2006-08-01 |
| 7042914 | Calibrated data communication system and method | Jared L. Zerbe, Kevin S. Donnelly, Stefanos Sidiropoulos, Donald C. Stark, Mark A. Horowitz +5 more | 2006-05-09 |
| 7039147 | Delay locked loop circuitry for clock delay adjustment | Kevin S. Donnelly, Pak Shing Chau, Mark A. Horowitz, Thomas H. Lee, Mark G. Johnson +7 more | 2006-05-02 |
| 6950956 | Integrated circuit with timing adjustment mechanism and method | Jared L. Zerbe, Kevin S. Donnelly, Stefanos Sidiropoulos, Donald C. Stark, Mark A. Horowitz +5 more | 2005-09-27 |
| 6920622 | Method and apparatus for adjusting the phase of an output of a phase-locked loop | Yunteng Huang | 2005-07-19 |
| 6854030 | Integrated circuit device having a capacitive coupling element | Donald V. Perino, Haw-Jyh Liaw, Alfredo Moncayo, Kevin S. Donnelly, Richard M. Barth | 2005-02-08 |
| 6825785 | Digital expander apparatus and method for generating multiple analog control signals particularly useful for controlling a sub-varactor array of a voltage controlled oscillator | Yunteng Huang | 2004-11-30 |
| 6741109 | Method and apparatus for switching between input clocks in a phase-locked loop | Yunteng Huang, Michael H. Perrott | 2004-05-25 |
| 6687780 | Expandable slave device system | Richard M. Barth, Kevin S. Donnelly, Ely Tsern, Craig E. Hampel, Jeffrey D. Mitchell +4 more | 2004-02-03 |
| 6643787 | Bus system optimization | Jared L. Zerbe, Kevin S. Donnelly, Stefanos Sidiropoulos, Donald C. Stark, Mark A. Horowitz +5 more | 2003-11-04 |
| 6553452 | Synchronous memory device having a temperature register | Pak Shing Chau, Kevin S. Donnelly, Clemenz Portmann, Donald C. Stark, Stefanos Sidiropoulos +3 more | 2003-04-22 |
| 6539072 | Delay locked loop circuitry for clock delay adjustment | Kevin S. Donnelly, Pak Shing Chau, Mark A. Horowitz, Thomas H. Lee, Mark G. Johnson +7 more | 2003-03-25 |
| 6513103 | Method and apparatus for adjusting the performance of a synchronous memory system | Pak Shing Chau, Kevin S. Donnelly, Clemenz Portmann, Donald C. Stark, Stefanos Sidiropoulos +3 more | 2003-01-28 |
| 6496889 | Chip-to-chip communication system using an ac-coupled bus and devices employed in same | Donald V. Perino, Haw-Jyh Liaw, Alfredo Moncayo, Kevin S. Donnelly, Richard M. Barth | 2002-12-17 |
| 6448813 | Output driver circuit with well-controlled output impedance | Kevin S. Donnelly, Jared L. Zerbe | 2002-09-10 |
| 6198307 | Output driver circuit with well-controlled output impedance | Kevin S. Donnelly, Jared L. Zerbe | 2001-03-06 |
| 6133773 | Variable delay element | Pak Shing Chau, Kevin S. Donnelly, Clemenz Portmann, Donald C. Stark, Stefanos Sidiropoulos +3 more | 2000-10-17 |
| 6125157 | Delay-locked loop circuitry for clock delay adjustment | Kevin S. Donnelly, Pak Shing Chau, Mark A. Horowitz, Thomas H. Lee, Mark G. Johnson +6 more | 2000-09-26 |
| 5959481 | Bus driver circuit including a slew rate indicator circuit having a one shot circuit | Kevin S. Donnelly, Chanh Tran, Michael Ching | 1999-09-28 |
| 5945862 | Circuitry for the delay adjustment of a clock signal | Kevin S. Donnelly, Jun Kim, Mark A. Horowitz, Thomas H. Lee, Pak Shing Chau +3 more | 1999-08-31 |
| 5581213 | Variable gain amplifier circuit | Lloyd Frederick Linder, Don C. Devendorf | 1996-12-03 |