| 10310999 |
Flash memory controller with calibrated data communication |
Jared L. Zerbe, Kevin S. Donnelly, Stefanos Sidiropoulos, Donald C. Stark, Mark A. Horowitz +5 more |
2019-06-04 |
| 10225111 |
Partial response receiver |
Vladimir Stojanovic, Andrew Ho, Anthony Bessios, Grace Tsang, Mark A. Horowitz +2 more |
2019-03-05 |
| 10193642 |
Margin test methods and circuits |
Andrew Ho, Vladimir Stojanovic, Fred F. Chen |
2019-01-29 |
| 9998305 |
Multi-PAM output driver with distortion compensation |
Jared L. Zerbe, Pak Shing Chau, Kevin S. Donnelly, Mark A. Horowitz, Stefanos Sidiropoulos +2 more |
2018-06-12 |
| 9917708 |
Partial response receiver |
Vladimir Stojanovic, Andrew Ho, Anthony Bessios, Grace Tsang, Mark A. Horowitz +2 more |
2018-03-13 |
| 9785589 |
Memory controller that calibrates a transmit timing offset |
Jared L. Zerbe, Kevin S. Donnelly, Stefanos Sidiropoulos, Donald C. Stark, Mark A. Horowitz +5 more |
2017-10-10 |
| 9544169 |
Multiphase receiver with equalization circuitry |
Jared L. Zerbe, Pak Shing Chau, Kevin S. Donnelly, Mark A. Horowitz, Stefanos Sidiropoulos +2 more |
2017-01-10 |
| 9544071 |
Margin test methods and circuits |
Andrew Ho, Vladimir Stojanovic, Fred F. Chen |
2017-01-10 |
| 9407473 |
Partial response receiver |
Vladimir Stojanovic, Andrew Ho, Anthony Bessios, Grace Tsang, Mark A. Horowitz +2 more |
2016-08-02 |
| 9405678 |
Flash memory controller with calibrated data communication |
Jared L. Zerbe, Kevin S. Donnelly, Stefanos Sidiropoulos, Donald C. Stark, Mark A. Horowitz +5 more |
2016-08-02 |
| 9164933 |
Memory system with calibrated data communication |
Jared L. Zerbe, Kevin S. Donnelly, Stefanos Sidiropoulos, Donald C. Stark, Mark A. Horowitz +5 more |
2015-10-20 |
| 9116810 |
Margin test methods and circuits |
Andrew Ho, Vladimir Stojanovic, Fred F. Chen |
2015-08-25 |
| 9025678 |
Partial response receiver |
Vladimir Stojanovic, Mark A. Horowitz, Jared L. Zerbe, Anthony Bessios, Andrew Ho +2 more |
2015-05-05 |
| 8948212 |
Memory controller with circuitry to set memory device-specific reference voltages |
Jared L. Zerbe, Kevin S. Donnelly, Stefanos Sidiropoulos, Donald C. Stark, Mark A. Horowitz +5 more |
2015-02-03 |
| 8817932 |
Margin test methods and circuits |
Andrew Ho, Vladimir Stojanovic, Fred F. Chen |
2014-08-26 |
| 8634452 |
Multiphase receiver with equalization circuitry |
Jared L. Zerbe, Pak Shing Chau, Kevin S. Donnelly, Mark A. Horowitz, Stefanos Sidiropoulos +2 more |
2014-01-21 |
| 8630317 |
Memory system with calibrated data communication |
Jared L. Zerbe, Kevin S. Donnelly, Stefanos Sidiropoulos, Donald C. Stark, Mark A. Horowitz +5 more |
2014-01-14 |
| 8559493 |
Margin test methods and circuits |
Andrew Ho, Vladimir Stojanovic, Fred F. Chen |
2013-10-15 |
| 8428196 |
Equalizing receiver |
Vladimir Stojanovic, Mark A. Horowitz, Jared L. Zerbe, Anthony Bessios, Andrew Ho +2 more |
2013-04-23 |
| 8385492 |
Receiver circuit architectures |
Andrew Ho, Vladimir Stojanovic, Fred F. Chen |
2013-02-26 |
| 8296540 |
Method and apparatus for adjusting the performance of a synchronous memory system |
Pak Shing Chau, Kevin S. Donnelly, Clemenz Portmann, Donald C. Stark, Stefanos Sidiropoulos +3 more |
2012-10-23 |
| 8199859 |
Integrating receiver with precharge circuitry |
Jared L. Zerbe, Pak Shing Chau, Kevin S. Donnelly, Mark A. Horowitz, Stefanos Sidiropoulos +2 more |
2012-06-12 |
| 8170067 |
Memory system with calibrated data communication |
Jared L. Zerbe, Kevin S. Donnelly, Stefanos Sidiropoulos, Donald C. Stark, Mark A. Horowitz +5 more |
2012-05-01 |
| 8170163 |
Partial response receiver |
Vladimir Stojanovic, Mark A. Horowitz, Jared L. Zerbe, Anthony Bessios, Andrew Ho +2 more |
2012-05-01 |
| 8149972 |
Signaling with superimposed clock and data signals |
Aliazam Abbasfar, Amir Amirkhany |
2012-04-03 |