Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12164460 | Providing acknowledgements for system power management interface | Navdeep Mer, Naveen Kumar Narala, Sriharsha Chakka | 2024-12-10 |
| 11843486 | High-speed communication link with self-aligned scrambling | Tomer Rafael Ben-Chen, Lior Amarilio | 2023-12-12 |
| 11704086 | Fast activation during wake up in an audio system | Lior Amarilio, Jason Gonzalez | 2023-07-18 |
| 11522738 | High-speed communication link with self-aligned scrambling | Tomer Rafael Ben-Chen, Lior Amarilio | 2022-12-06 |
| 11520729 | I2C bus architecture using shared clock and dedicated data lines | Lalan Jee Mishra, Radu Pitigoi-Aron, Lior Amarilio, Richard Dominic Wietfeldt | 2022-12-06 |
| 11366508 | Extended current limit message latency aware performance mitigation | Prashanth Kumar KAKKIRENI, Naveen Kumar Narala | 2022-06-21 |
| 11360916 | Group slave identifier time-multiplexed acknowledgment for system power management interface | Navdeep Mer, Lior Amarilio | 2022-06-14 |
| 11354266 | Hang correction in a power management interface bus | Kishalay Haldar, Navdeep Mer, Viney Kumar, Sriharsha Chakka | 2022-06-07 |
| 11347667 | Bus controller and related methods | Tomer Rafael Ben-Chen, Shaul Yohai Yifrach | 2022-05-31 |
| 11327922 | Bus ownership for a system power management interface (SPMI) bus | Sai Ganapathy Srinivasan, Navdeep Mer, Sriharsha Chakka | 2022-05-10 |
| 11064295 | Scrambling data-port audio in SOUNDWIRE systems | Lior Amarilio, Yiftach Benjamini | 2021-07-13 |
| 11030133 | Aggregated in-band interrupt based on responses from slave devices on a serial data bus line | Meital Zangvil, Tomer Rafael Ben-Chen | 2021-06-08 |
| 11010327 | I3C point to point | Meital Zangvil, Lior Amarilio | 2021-05-18 |
| 10877088 | In-system structural testing of a system-on-chip (SoC) using a peripheral interface port | Punit Kishore, Tomer Rafael Ben-Chen | 2020-12-29 |
| 10733121 | Latency optimized I3C virtual GPIO with configurable operating mode and device skip | Lalan Jee Mishra, Radu Pitigoi-Aron, Richard Dominic Wietfeldt, Lior Amarilio, Kishalay Haldar +1 more | 2020-08-04 |
| 10725949 | Slave-to-slave direct communication | Lior Amarilio, Mark Gakman | 2020-07-28 |
| 10713199 | High bandwidth soundwire master with multiple primary data lanes | Lior Amarilio, Amit Gil | 2020-07-14 |
| 10684981 | Fast termination of multilane single data rate transactions | Radu Pitigoi-Aron, Richard Dominic Wietfeldt | 2020-06-16 |
| 10678723 | Urgent in-band interrupts on an I3C bus | Lior Amarilio, Mark Gakman | 2020-06-09 |
| 10572439 | I3C read from long latency devices | Meital Zangvil, Lior Amarilio | 2020-02-25 |
| 10560780 | Phase alignment in an audio bus | Lior Amarilio, Ghanashyam Prabhu, Mouna Elkhatib | 2020-02-11 |
| 10511397 | Virtual general purpose input/output (GPIO) (VGI) over a time division multiplex (TDM) bus | Lior Amarilio, Lalan Jee Mishra | 2019-12-17 |
| 10496562 | Low latency virtual general purpose input/output over I3C | Lior Amarilio, Tomer Rafael Ben-Chen | 2019-12-03 |
| 9524264 | Generating combined bus clock signals using asynchronous master device reference clocks in shared bus systems, and related methods, devices, and computer-readable media | Yossi Amon, David A. Friedman, Ben Levin | 2016-12-20 |
| 8422516 | Scalable DigRF architecture | Steffen Reinhardt | 2013-04-16 |