Issued Patents All Time
Showing 1–25 of 131 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12373365 | Bus interrupt debounce on a one-wire bidirectional bus | Lalan Jee Mishra, Umesh Srikantiah, Ryan Scott Castro SPRING, Jia Fu Cen | 2025-07-29 |
| 12283961 | Automatic clock rate synchronization for 1-wire radio frequency front-end interface | Lalan Jee Mishra, Umesh Srikantiah | 2025-04-22 |
| 12271492 | Mode switch for link-based and application-based security operations | Philip Michael Hawkes, Jonathan PETIT, William Whyte | 2025-04-08 |
| 12248365 | Error handling for a mixed mode RFFE bus | Umesh Srikantiah, Lalan Jee Mishra, Boris Alpin, Francesco Gatta | 2025-03-11 |
| 12124400 | Independent addressing of one-wire and two-wire devices on a shared RFFE bus interface | Umesh Srikantiah, Lalan Jee Mishra, Francesco Gatta | 2024-10-22 |
| 12124401 | Interrupt management on a one-wire bidirectional bus | Lalan Jee Mishra, Umesh Srikantiah, Francesco Gatta | 2024-10-22 |
| 12034469 | Variable stride counting for timed-triggers in a radio frequency front end (RFFE) bus | Lalan Jee Mishra, Umesh Srikantiah, Karthik Manivannan | 2024-07-09 |
| 11907149 | Sideband signaling in universal serial bus (USB) type-C communication links | Lalan Jee Mishra, Yiftach Benjamini | 2024-02-20 |
| 11907154 | Latency and power efficient clock and data recovery in a high-speed one-wire bidirectional bus | Lalan Jee Mishra, Umesh Srikantiah, Francesco Gatta, Muhlis Kenan Ozel | 2024-02-20 |
| 11886366 | One-wire bidirectional bus signaling with manchester encoding | Lalan Jee Mishra, Umesh Srikantiah | 2024-01-30 |
| 11847087 | Systems and methods for chip operation using serial peripheral interface (SPI) with reduced pin options | Lalan Jee Mishra, Radu Pitigoi-Aron | 2023-12-19 |
| 11720512 | Unified systems and methods for interchip and intrachip node communication | Maxime Leclercq, George Alan Wiley | 2023-08-08 |
| 11556486 | Versatile control messaging scheme for radio coexistence management | Mohit Kishore Prasad, Lalan Jee Mishra | 2023-01-17 |
| 11531608 | Error signaling windows for phase-differential protocols | Radu Pitigoi-Aron, Lalan Jee Mishra | 2022-12-20 |
| 11520727 | Sideband signaling in a peripheral component interconnect (PCI) express (PCIE) link | Lalan Jee Mishra, Mohit Kishore Prasad, James Lionel Panian | 2022-12-06 |
| 11520729 | I2C bus architecture using shared clock and dedicated data lines | Lalan Jee Mishra, Radu Pitigoi-Aron, Sharon Graif, Lior Amarilio | 2022-12-06 |
| 11515676 | Thermal mitigation for USB power delivery | Lalan Jee Mishra, James Lionel Panian, Georgios Konstantinos Paparrizos | 2022-11-29 |
| 11513994 | Timed-trigger synchronization enhancement | Lalan Jee Mishra, Umesh Srikantiah | 2022-11-29 |
| 11513991 | Batch operation across an interface | Lalan Jee Mishra, Radu Pitigoi-Aron | 2022-11-29 |
| 11509130 | Disconnection arc prevention in cable-supplied power connection | Lalan Jee Mishra, Georgios Konstantinos Paparrizos, Joshua Warner | 2022-11-22 |
| 11385676 | Single-counter, multi-trigger systems and methods in communication systems | Lalan Jee Mishra | 2022-07-12 |
| 11356314 | Pulse amplitude modulation (PAM) encoding for a communication bus | Lalan Jee Mishra, George Alan Wiley, Radu Pitigoi-Aron | 2022-06-07 |
| 11334134 | Integrated circuit | Lalan Jee Mishra, Naveen Kumar Narala, Christopher Kong Yee Chun | 2022-05-17 |
| 11275703 | Real-time control compliant radio frequency coexistence management bus | Lalan Jee Mishra, Mohit Kishore Prasad, Irfan Khan | 2022-03-15 |
| 11256637 | Legacy-compatible 8-bit addressing on RFFE bus for increased device connections | Lalan Jee Mishra | 2022-02-22 |