MS

Michael A. Stuber

QU Qualcomm: 29 patents #797 of 12,104Top 7%
PS Psemi: 16 patents #27 of 166Top 20%
PS Peregrine Semiconductor: 11 patents #14 of 112Top 15%
IS Io Semiconductor: 10 patents #1 of 9Top 15%
SU Silanna Semiconductor U.S.A.: 10 patents #2 of 12Top 20%
SP Silanna Asia Pte: 9 patents #8 of 46Top 20%
UN Unisys: 1 patents #1,020 of 2,015Top 55%
📍 Carlsbad, CA: #39 of 2,500 inventorsTop 2%
🗺 California: #2,909 of 386,348 inventorsTop 1%
Overall (All Time): #19,185 of 4,157,543Top 1%
87
Patents All Time

Issued Patents All Time

Showing 26–50 of 87 patents

Patent #TitleCo-InventorsDate
10217822 Semiconductor-on-insulator with back side heat dissipation Paul A. Nygaard, Stuart B. Molin, Max Samuel Aubain 2019-02-26
10211167 Methods of making integrated circuit assembly with faraday cage and including a conductive ring 2019-02-19
10192989 Integrated circuit connection arrangement for minimizing crosstalk Shanghui Larry Tu, Befruz Tasbas, Stuart B. Molin, Raymond Jiang 2019-01-29
10153763 Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink Christopher N. Brindle, Dylan J. Kelly, Clint L. Kemerling, George Imthurn, Mark L. Burgener 2018-12-11
10083897 Connection arrangements for integrated lateral diffusion field effect transistors having a backside contact Shanghui Larry Tu, Befruz Tasbas, Stuart B. Molin, Raymond Jiang 2018-09-25
10079230 Double-sided vertical semiconductor device with thinned substrate Stuart B. Molin 2018-09-18
9923059 Connection arrangements for integrated lateral diffusion field effect transistors Shanghui Larry Tu, Befruz Tasbas, Stuart B. Molin, Raymond Jiang 2018-03-20
9847293 Utilization of backside silicidation to form dual side contacted capacitor Sinan Goktepeli, Plamen Vassilev Kolev, Richard Hammond, Shiqun Gu, Steve Fanelli 2017-12-19
9783414 Forming semiconductor structure with device layers and TRL 2017-10-10
9786613 EMI shield for high frequency layer transferred devices 2017-10-10
9780117 Semiconductor structure with active device and damaged region Paul A. Nygaard 2017-10-03
9780775 Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink Christopher N. Brindle, Dylan J. Kelly, Clint L. Kemerling, George Imthurn, Mark L. Burgener 2017-10-03
9754860 Redistribution layer contacting first wafer through second wafer Stuart B. Molin, Mark Drucker 2017-09-05
9748272 Semiconductor-on-insulator with back side strain inducing material Paul A. Nygaard, Stuart B. Molin 2017-08-29
9673219 Vertical semiconductor device with thinned substrate Stuart B. Molin 2017-06-06
9647209 Integrated phase change switch Sinan Goktepeli 2017-05-09
9624096 Forming semiconductor structure with device layers and TRL 2017-04-18
9608619 Method and apparatus improving gate oxide reliability by controlling accumulated charge Christopher N. Brindle, Dylan J. Kelly, Clint L. Kemerling, George Imthurn, Robert B. Welstand +3 more 2017-03-28
9576937 Back-to-back stacked integrated circuit assembly Stuart B. Molin 2017-02-21
9570558 Trap rich layer for semiconductor devices Christopher N. Brindle, Stuart B. Molin 2017-02-14
9558951 Trap rich layer with through-silicon-vias in semiconductor devices Anton Arriagada, Chris Brindle 2017-01-31
9553013 Semiconductor structure with TRL and handle wafer cavities George Imthurn 2017-01-24
9530796 Semiconductor-on-insulator integrated circuit with interconnect below the insulator Stuart B. Molin, Chris Brindle 2016-12-27
9515139 Trap rich layer formation techniques for semiconductor devices Anton Arriagada, Stuart B. Molin 2016-12-06
9496227 Semiconductor-on-insulator with back side support layer Stuart B. Molin, Paul A. Nygaard 2016-11-15