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USPTO Patent Rankings Data through Dec 31, 2025
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Chris Brindle — 10 Patents

ISIo Semiconductor: 5 patents #3 of 9Top 35%
Qualcomm: 3 patents #4,553 of 12,104Top 40%
SUSilanna Semiconductor U.S.A.: 2 patents #5 of 12Top 45%
Poway, CA: #188 of 1,186 inventorsTop 20%
California: #61,378 of 386,348 inventorsTop 20%
Overall (All Time): #481,000 of 4,157,543Top 15%
10 Patents All Time
Chris Brindle has been granted 10 US patents while listed as an inventor at Io Semiconductor. The first was granted in 2013 and the most recent in January 2017. Chris Brindle ranks #481,000 of 4,157,543 US inventors in our database (top 11.6%). Patent records list Chris Brindle in Poway, CA, US.

Issued Patents All Time

Showing 1–10 of 10 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9558951 Trap rich layer with through-silicon-vias in semiconductor devices Anton Arriagada, Michael A. Stuber 2017-01-31 $8,983,000
9530796 Semiconductor-on-insulator integrated circuit with interconnect below the insulator Michael A. Stuber, Stuart B. Molin 2016-12-27 $13,435,000
9331098 Semiconductor-on-insulator integrated circuit with reduced off-state capacitance Michael A. Stuber, Stuart B. Molin 2016-05-03
9153434 Methods for the formation of a trap rich layer Michael A. Stuber, Stuart B. Molin 2015-10-06
8835281 Methods for the formation of a trap rich layer Michael A. Stuber, Stuart B. Molin 2014-09-16
8748245 Semiconductor-on-insulator integrated circuit with interconnect below the insulator Michael A. Stuber, Stuart B. Molin 2014-06-10
8581398 Trap rich layer with through-silicon-vias in semiconductor devices Anton Arriagada, Michael A. Stuber 2013-11-12
8481405 Trap rich layer with through-silicon-vias in semiconductor devices Anton Arriagada, Michael A. Stuber 2013-07-09
8466036 Trap rich layer for semiconductor devices Michael A. Stuber, Stuart B. Molin 2013-06-18
8466054 Thermal conduction paths for semiconductor structures Michael A. Stuber, Stuart B. Molin 2013-06-18