ST

Shanghui Larry Tu

SP Silanna Asia Pte: 16 patents #5 of 46Top 15%
ON onsemi: 14 patents #103 of 1,901Top 6%
VS Vanguard International Semiconductor: 1 patents #340 of 585Top 60%
📍 San Diego, CA: #1,174 of 23,606 inventorsTop 5%
🗺 California: #15,733 of 386,348 inventorsTop 5%
Overall (All Time): #109,593 of 4,157,543Top 3%
32
Patents All Time

Issued Patents All Time

Showing 1–25 of 32 patents

Patent #TitleCo-InventorsDate
12230707 Source contact formation of MOSFET with gate shield buffer for pitch reduction Touhidur Rahman 2025-02-18
12211894 Ultra-high voltage resistor with voltage sense Wen-Cheng Lin, Ren Huei Tzeng 2025-01-28
12159815 Connection arrangements for integrated lateral diffusion field effect transistors having a backside contact Michael A. Stuber, Befruz Tasbas, Stuart B. Molin, Raymond Jiang 2024-12-03
11869934 Ultra-high voltage resistor with voltage sense Wen-Cheng Lin, Ren Huei Tzeng 2024-01-09
11735656 Source contact formation of MOSFET with gate shield buffer for pitch reduction Touhidur Rahman 2023-08-22
11664449 LDMOS architecture and method for forming David M. Snyder 2023-05-30
11335627 Connection arrangements for integrated lateral diffusion field effect transistors having a backside contact Michael A. Stuber, Befruz Tasbas, Stuart B. Molin, Raymond Jiang 2022-05-17
11282955 LDMOS architecture and method for forming David M. Snyder 2022-03-22
10790389 Source contact formation of MOSFET with gate shield buffer for pitch reduction Touhidur Rahman 2020-09-29
10546804 Connection arrangements for integrated lateral diffusion field effect transistors having a backside contact Michael A. Stuber, Befruz Tasbas, Stuart B. Molin, Raymond Jiang 2020-01-28
10446687 Integrated circuit connection arrangement for minimizing crosstalk Michael A. Stuber, Befruz Tasbas, Stuart B. Molin, Raymond Jiang 2019-10-15
10424661 Avalanche robust LDMOS Vadim Kushner, Eric Vann 2019-09-24
10424666 Leadframe and integrated circuit connection arrangement Michael A. Stuber, Befruz Tasbas, Stuart B. Molin, Raymond Jiang 2019-09-24
10249759 Connection arrangements for integrated lateral diffusion field effect transistors Michael A. Stuber, Befruz Tasbas, Stuart B. Molin, Raymond Jiang 2019-04-02
10192989 Integrated circuit connection arrangement for minimizing crosstalk Michael A. Stuber, Befruz Tasbas, Stuart B. Molin, Raymond Jiang 2019-01-29
10083897 Connection arrangements for integrated lateral diffusion field effect transistors having a backside contact Michael A. Stuber, Befruz Tasbas, Stuart B. Molin, Raymond Jiang 2018-09-25
9923059 Connection arrangements for integrated lateral diffusion field effect transistors Michael A. Stuber, Befruz Tasbas, Stuart B. Molin, Raymond Jiang 2018-03-20
8304326 Edge seal for a semiconductor device and method therefor Gordon M. Grivna 2012-11-06
8168466 Schottky diode and method therefor Mohammed Tanvir Quddus, Antonin Rozsypal, Zia Hossain 2012-05-01
8049309 Edge seal for a semiconductor device Gordon M. Grivna 2011-11-01
7943466 Method of forming a semiconductor device having sub-surface trench charge compensation regions Gordon M. Grivna 2011-05-17
7875950 Schottky diode structure with multi-portioned guard ring and method of manufacture Fumika Kuramae 2011-01-25
7799640 Method of forming a semiconductor device having trench charge compensation regions John Michael Parsey, Jr., Gordon M. Grivna 2010-09-21
7682955 Method for forming deep well of power device Hung-Shern Tsai, Jui-Chun Chang 2010-03-23
7679146 Semiconductor device having sub-surface trench charge compensation regions Gordon M. Grivna 2010-03-16