Issued Patents All Time
Showing 1–25 of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12342518 | Compartmentalized shielding of a module utilizing self-shielded sub-modules | Howard Terry Glascock, Charles E. Carpenter, Mudar Al-Joumayly, Peter Cotterill | 2025-06-24 |
| 12231109 | Electronic device with solder interconnect and multiple material encapsulant | Charles E. Carpenter, Howard Terry Glascock, Paul Stokes | 2025-02-18 |
| 11765826 | Method of fabricating contact pads for electronic substrates | John August Orlowski, David Jandzinski | 2023-09-19 |
| 11387190 | Shielded electronic modules and methods of forming the same utilizing plating and double-cut singulation | Stephen Parker, Jerry Holt, John Davisson, Rommel Quintero Nevarez | 2022-07-12 |
| 11219144 | Electromagnetic shields for sub-modules | Kelly M. Lear, Jeffrey Miller, Jeffrey Dekosky | 2022-01-04 |
| 11127689 | Segmented shielding using wirebonds | Brian Howard Calhoun, W. Kent Braxton, Domingo Farias, Joseph Edward Geniac, Kyle Sullivan +1 more | 2021-09-21 |
| 11058038 | Electromagnetic shields for sub-modules | Kelly M. Lear, Jeffrey Miller, Jeffrey Dekosky | 2021-07-06 |
| 11024541 | Process for molding a back side wafer singulation guide | Neftali Salazar, Rommel Quintero | 2021-06-01 |
| 10905007 | Contact pads for electronic substrates and related methods | John August Orlowski, David Jandzinski | 2021-01-26 |
| 10888040 | Double-sided module with electromagnetic shielding | David Jandzinski, Brian Howard Calhoun | 2021-01-05 |
| 10811364 | Shielded electronic modules and methods of forming the same utilizing plating and double-cut singulation | Stephen Parker, Jerry Holt, John Davisson, Rommel Quintero Nevarez | 2020-10-20 |
| 10777524 | Using an interconnect bump to traverse through a passivation layer of a semiconductor die | Michael Meeder | 2020-09-15 |
| 10607960 | Substrate structure with selective surface finishes for flip chip assembly | Robert Hartmann | 2020-03-31 |
| 10553545 | Electromagnetic shielding for integrated circuit modules | Donald Joseph Leahy, James Edwin Culler, Jr. | 2020-02-04 |
| 10283480 | Substrate structure with selective surface finishes for flip chip assembly | Robert Hartmann | 2019-05-07 |
| 10020206 | Encapsulated dies with enhanced thermal performance | David Jandzinski, Stephen Parker, Jon Chadwick, Julio C. Costa | 2018-07-10 |
| 9960145 | Flip chip module with enhanced properties | Julio C. Costa, Jonathan Hale Hammond, David Jandzinski, Stephen Parker, Jon Chadwick | 2018-05-01 |
| 9942994 | Connection using conductive vias | Ulrik Riis Madsen, Donald Joseph Leahy | 2018-04-10 |
| 9935066 | Semiconductor package having a substrate structure with selective surface finishes | Robert Hartmann | 2018-04-03 |
| 9897512 | Laminate variables measured electrically | David C. Dening, Chris Botzis | 2018-02-20 |
| 9661739 | Electronic modules having grounded electromagnetic shields | Donald Joseph Leahy, Brian D. Sawyer, Stephen Parker | 2017-05-23 |
| 9646857 | Low pressure encapsulant for size-reduced semiconductor package | Howard Terry Glascock, Frank J. Juskey, Charles E. Carpenter, Robert Hartmann | 2017-05-09 |
| 9613831 | Encapsulated dies with enhanced thermal performance | David Jandzinski, Stephen Parker, Jon Chadwick, Julio C. Costa | 2017-04-04 |
| 9420704 | Connection using conductive vias | Ulrik Riis Madsen, Donald Joseph Leahy | 2016-08-16 |
| 9269887 | Ultrathin flip-chip packaging techniques and configurations | Frank J. Juskey, Robert Hartmann, Howard Terry Glascock, Jose F. Ordonez | 2016-02-23 |