Issued Patents All Time
Showing 26–39 of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6453367 | Methods and apparatus for providing direct memory access control | — | 2002-09-17 |
| 6430677 | Methods and apparatus for dynamic instruction controlled reconfigurable register file with extended precision | Gerald George Pechanek | 2002-08-06 |
| 6397324 | Accessing tables in memory banks using load and store address generators sharing store read port of compute register file separated from address register file | Charles W. Kurak, Jr., Gerald George Pechanek, Larry D. Larsen | 2002-05-28 |
| 6366999 | Methods and apparatus to support conditional execution in a VLIW-based array processor with subword execution | Thomas L. Drabenstott, Gerald George Pechanek, Charles W. Kurak, Jr. | 2002-04-02 |
| 6366997 | Methods and apparatus for manarray PE-PE switch control | Gerald George Pechanek, Thomas L. Drabenstott, Edward A. Wolff, Nikos P. Pitsianis, Grayson Morris | 2002-04-02 |
| 6343356 | Methods and apparatus for dynamic instruction controlled reconfiguration register file with extended precision | Gerald George Pechanek | 2002-01-29 |
| 6321322 | Methods and apparatus for scalable instruction set architecture with dynamic compact instructions | Gerald George Pechanek, Juan Guillermo Revilla, Larry D. Larsen | 2001-11-20 |
| 6260082 | Methods and apparatus for providing data transfer control | Edward A. Wolff | 2001-07-10 |
| 6256683 | Methods and apparatus for providing direct memory access control | — | 2001-07-03 |
| 6216223 | Methods and apparatus to dynamically reconfigure the instruction pipeline of an indirect very long instruction word scalable processor | Juan Guillermo Revilla, Patrick R. Marchand, Gerald George Pechanek | 2001-04-10 |
| 6173389 | Methods and apparatus for dynamic very long instruction word sub-instruction selection for execution time parallelism in an indirect very long instruction word processor | Gerald George Pechanek, Juan Guillermo Revilla | 2001-01-09 |
| 6167501 | Methods and apparatus for manarray PE-PE switch control | Gerald George Pechanek, Thomas L. Drabenstott, Edward A. Wolff, Nikos P. Pitsianis, Grayson Morris | 2000-12-26 |
| 6167502 | Method and apparatus for manifold array processing | Gerald George Pechanek, Nikos P. Pitsianis, Thomas L. Drabenstott | 2000-12-26 |
| 6101592 | Methods and apparatus for scalable instruction set architecture with dynamic compact instructions | Gerald George Pechanek, Juan Guillermo Revilla, Larry D. Larsen | 2000-08-08 |