Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Integrated device die and package with stress reduction features

Integrated device die and package with stress reduction features

US Patent 9343367 · Granted May 17, 2016

Estimated economic value: $34,057,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Low stress integrated device package2023
Low stress integrated device packages2020
Cavity package with composite substrate2019
Stress isolation features for stacked dies2019
Stress isolation features for stacked dies2019
Cavity package with composite substrate2017
Integrated device die and package with stress reduction features2017
Integrated device die and package with stress reduction features2017
Pre-molded MEMS device package having conductive column coupled to leadframe and2017
Low stress compact device packages2017
Two-axis vertical mount package assembly2016
Microphone package with embedded ASIC2016