Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Integration of semiconductor alloys in PMOS and NMOS transistors by using a common cavity etch process

Integration of semiconductor alloys in PMOS and NMOS transistors by using a common cavity etch process

US Patent 9269631 · Granted Feb 23, 2016

Estimated economic value: $655,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Roller conveyor2025
Conveyor device2025
Flushable pressure vessel2023
Self-sealing valve connection for pressure vessels2022
Epitaxial channel formation methods and structures2017
Performance enhancement in transistors by providing an embedded strain-inducing 2016
Graded well implantation for asymmetric transistors having reduced gate electrod2016
Strain engineering in semiconductor devices by using a piezoelectric material2016
Performance enhancement in transistors by providing an embedded strain-inducing 2015
Adjusting configuration of a multiple gate transistor by controlling individual 2015
Methods of forming silicon/germanium protection layer above source/drain regions2015
Horizontal epitaxy furnace for channel SiGe formation2015