Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Recording and profiling transaction failure source addresses and states of validity indicator corresponding to addresses of aborted transaction in hardware transactional memories

Recording and profiling transaction failure source addresses and states of validity indicator corresponding to addresses of aborted transaction in hardware transactional memories

US Patent 9268598 · Granted Feb 23, 2016

Estimated economic value: $5,149,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Managing a programmable cache control mapping table in a system level cache2025
Managing a system level cache2025
Systems and methods for dynamic control of a secure mode of operation in a proce2025
Routing instruction results to a register block of a subdivided register file ba2025
Parallel slice processor having a recirculating load-store queue for fast deallo2024
Fast mapper restore for flush in processor2024
Systems and methods for dynamic control of a secure mode of operation in a proce2023
Prioritization of threads in a simultaneous multithreading processor core2023
Instruction handling for accumulation of register results in a microprocessor2023
Parallel slice processor having a recirculating load-store queue for fast deallo2023
Memory access request for a memory protocol2023
Method and apparatus for front end gather/scatter memory coalescing2023