Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Isolating failing latches using a logic built-in self-test

Isolating failing latches using a logic built-in self-test

US Patent 9057766 · Granted Jun 16, 2015

Estimated economic value: $2,098,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Self-contained built-in self-test circuit with phase-shifting abilities for high2023
Built-in-self-test and characterization of a high speed serial link receiver2022
Reducing chip latency at a clock boundary by reference clock phase adjustment2020
Built-in self-test for receiver channel2020
Built-in self-test for receiver channel2020
Circuit design for balanced logic stress2016
Evaluation of multiple input signature register results2016
Anti-counterfeiting opto-thermal watermark for electronics2016
Circuit design for balanced logic stress2016
Anti-counterfeiting opto-thermal watermark for electronics2016
On-chip detection of types of operations tested by an LBIST2015
On-chip detection of types of operations tested by an LBIST2015