Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method of creating a maskless air gap in back end interconnects with double self-aligned vias

Method of creating a maskless air gap in back end interconnects with double self-aligned vias

US Patent 8975138 · Granted Mar 10, 2015

Estimated economic value: $28,858,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Self-assembled guided hole and via patterning over grating2025
Self-assembled guided hole and via patterning over grating2025
Subtractively patterned interconnect structures for integrated circuits2025
Subtractively patterned interconnect structures for integrated circuits2025
Integrated circuit structure with filled recesses2025
Bilayer memory stacking with computer logic circuits shared between bottom and t2025
Contact over active gate structures with conductive trench contact taps for adva2025
Contact over active gate structures with conductive trench contact taps for adva2025
Backend memory with air gaps in upper metal layers2025
Backside wafer treatments to reduce distortions and overlay errors during wafer 2025
Passivation layers for thin film transistors2025
Bottom-up fill dielectric materials for semiconductor structure fabrication and 2025