Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Applying negative gate voltage to wordlines adjacent to wordline associated with read or verify to reduce adjacent wordline disturb

Applying negative gate voltage to wordlines adjacent to wordline associated with read or verify to reduce adjacent wordline disturb

US Patent 7995386 · Granted Aug 9, 2011

Estimated economic value: $1,938,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Methods and systems for SLC copyback operations2025
Silicone-based barrier compositions2025
One-time programmable (ROTP) NVM2025
Fuel cell with polymer electrolyte membrane2025
Fuel cell catalyst, method for preparing the same, and fuel cell comprising the 2025
Dual distanced sensing method for passive range finding2025
Optical sightline tracking for a wearable system2025
Image sensor with charge transfer between pixels2025
Pixel architecture with multiple pixel binning2025
SPAD sensor for night vision applications2025
Image sensor with stacked CCD and CMOS architecture2025
Magnetic memory device2025