Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Bus controller initiated write-through mechanism with hardware automatically generated clean command

Bus controller initiated write-through mechanism with hardware automatically generated clean command

US Patent 7877550 · Granted Jan 25, 2011

Estimated economic value: $4,442,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Performance optimized congruence class matching for multiple concurrent radix tr2020
Avoiding deadlocks in processor-based systems employing retry and in-order-respo2018
Maintaining cache coherency using conditional intervention among multiple master2018
Bridging strongly ordered write transactions to devices in weakly ordered domain2017
Performance monitor design for instruction profiling using shared counters2013
Performance monitor design for counting events generated by thread groups2013
Sharing sampled instruction address registers for efficient instruction sampling2013
System and method for cache coherency in a multiprocessor system2013
System and method for optimizing neighboring cache usage in a multiprocessor env2012
System and method for cache-locking mechanism using translation table attributes2012
Method for security in electronically fused encryption keys2012
System and method for cache-locking mechanism using segment table attributes for2012