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Home › Integrated circuit fabrication process using a compression cap layer in forming a silicide with minimal post-laser annealing dopant deactivation

Integrated circuit fabrication process using a compression cap layer in forming a silicide with minimal post-laser annealing dopant deactivation

US Patent 7863193 · Granted Jan 4, 2011

Estimated economic value: $40,109,000 ⓘ

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