Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method of fabricating a semiconductor structure including one device region having a metal gate electrode located atop a thinned polygate electrode

Method of fabricating a semiconductor structure including one device region having a metal gate electrode located atop a thinned polygate electrode

US Patent 7833849 · Granted Nov 16, 2010

Estimated economic value: $4,384,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Display screen with a graphical user interface2025
Conductive oxide diffusion barrier for laser crystallization2025
Wearable device for monitoring bodily fluids2025
Bulk nanosheet with dielectric isolation2025
Mobile check deposit2025
PVD tool to deposit highly reactive materials2025
Selective passivation and selective deposition2025
Mobile check deposit2025
MRAM stack with reduced height2025
Mobile check deposit2025
Ion beam sputtering with ion assisted deposition for coatings on chamber compone2025
Structure and process to tuck fin tips self-aligned to gates2024