Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and system for improving the topography of a memory array

Method and system for improving the topography of a memory array

US Patent 7226839 · Granted Jun 5, 2007

Estimated economic value: $3,927,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Bonded assembly containing conductive via structures extending through word line2025
Field effect transistors with reduced gate fringe area and method of making the 2025
X-ray imaging apparatus and positional deviation detection unit for X-ray imagin2025
Three-dimensional memory device containing memory opening monitoring area and me2025
X-direction divided sub-block mode in NAND2025
Three-dimensional nor array and method of making the same2025
Three-dimensional nor array and method of making the same2025
Numerical controller, numerical control machine tool, machining program generati2025
Three-dimensional memory device with separated contact regions2025
Semiconductor wafer configured for single touch-down testing2025
Silicon carbide single crystal and semiconductor apparatus2024
Transistor circuits including fringeless transistors and method of making the sa2024