Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method for manufacturing electronic devices having HV transistors and LV transistors with salicided junctions

Method for manufacturing electronic devices having HV transistors and LV transistors with salicided junctions

US Patent 6251728 · Granted Jun 26, 2001

Estimated economic value: $22,689,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Method and circuit for locating anomalous memory cells2006
Non-volatile high-performance memory device and relative manufacturing process2004
Circuit structure with a parasitic transistor having high threshold voltage2003
Method for manufacturing electronic devices having non-volatile memory cells and2003
Method for manufacturing electronic devices having non-volatile memory cells and2003
Method for manufacturing electronic devices having non-volatile memory cells and2003
Mask programmed ROM inviolable by reverse engineering inspections and method of 2003
Mask programmed ROM inviolable by reverse engineering inspections and method of 2003
Method for obtaining a multi-level ROM in an EEPROM process flow2003
Method for obtaining a multi-level ROM in an EEPROM process flow2003
Method for obtaining a multi-level ROM in an EEPROM process flow2003
Process for manufacturing electronic devices having non-salicidated non-volatile2003