Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Low power method of depositing a low k dielectric with organo silane

Low power method of depositing a low k dielectric with organo silane

US Patent 6072227 · Granted Jun 6, 2000

Estimated economic value: $87,913,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Semiconductor device including stress control layer and methods of forming the s2025
Semiconductor package and method of manufacture2025
Dicing process in packages comprising organic interposers2025
Package structure2025
Semiconductor package including stress buffers and methods of forming the same2025
Semiconductor structure and manufacturing method thereof2025
Integrated fan-out package having stress release structure2025
Integrated passive device dies and methods of forming and placement of the same2025
Semiconductor device and method of manufacture2025
Redistribution structure with warpage tuning layer2025
Reconstructed substrates for high I/O counts application and methods for forming2025
Chip package structure including an underfill material portion comprising a cut 2025