Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Super self-align process for fabricating submicron CMOS using micron design rule fabrication equipment

Super self-align process for fabricating submicron CMOS using micron design rule fabrication equipment

US Patent 5643815 · Granted Jul 1, 1997

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Front side illuminated photodiode with backside bump2009
Front side illuminated photodiode with backside bump2006
Method of utilizing IDDQ tests to screen out defective parts2000
Radiation-hard, low power, sub-micron CMOS on a SOI substrate1998
Method of making a self-aligned static induction transistor1997
Nonvolatile memory device1997
Method for fabricating gate structure for nonvolatile memory device comprising a1996
Transistor fabrication method using dielectric protection layers to eliminate em1996
Transistor fabrication method using dielectric protection layers to eliminate em1996
Self-aligned ion implanted transition metal contact diffusion barrier apparatus1996
Self-aligned bipolar transistor with very thin dielectric layer interfacing betw1995
CBiCMOS fabrication method using sacrificial gate poly1995