Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method of fabricating a semiconductor device having reduced contact resistance

Method of fabricating a semiconductor device having reduced contact resistance

US Patent 11195923 · Granted Dec 7, 2021

Estimated economic value: $82,478,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Doped polar layers and semiconductor device incorporating same2025
Movable central reflectors of semiconductor processing equipment, and related sy2025
Methods of correlating zones of processing chambers, and related systems and met2025
Flow guide structures and heat shield structures, and related methods, for depos2025
Thermal processing susceptor2025
Thermal processing susceptor2025
Multi color stack for self aligned dual pattern formation for multi purpose devi2025
Doped polar layers and semiconductor device incorporating same2025
Formation of gate all around device2025
Graded superlattice structure for gate all around devices2025
Graded superlattice structure for gate all around devices2025
Scalable and customizable computation using a modularized code architecture2025