Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method to ensure forward progress of a processor in the presence of persistent external cache/TLB maintenance requests

Method to ensure forward progress of a processor in the presence of persistent external cache/TLB maintenance requests

US Patent 11080188 · Granted Aug 3, 2021

Estimated economic value: $263,472,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Prediction confirmation for cache subsystem2025
Using a next fetch predictor circuit with short branches and return fetch groups2025
Trace cache with filter for internal control transfer inclusion2025
Processor implementing parallel in-order execution during load misses2024
Storage array invalidation maintenance2024
Storage array invalidation maintenance2024
Virtual channel support using write table2024
Real-time processing in computer systems2024
Real-time processing in computer systems2024
Prediction confirmation for cache subsystem2024
Air acceleration at slot of wing2023
Storage array invalidation maintenance2023