Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Efficiently managing speculative finish tracking and error handling for load instructions

Efficiently managing speculative finish tracking and error handling for load instructions

US Patent 10423423 · Granted Sep 24, 2019

Estimated economic value: $3,094,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Gather buffer management for unaligned and gather load operations2025
Routing instruction results to a register block of a subdivided register file ba2025
Routing instruction results to a register block of a subdivided register file ba2025
Parallel slice processor having a recirculating load-store queue for fast deallo2024
Parallel slice processor having a recirculating load-store queue for fast deallo2024
Assignment of microprocessor register tags at issue time2024
Fast mapper restore for flush in processor2024
Fast mapper restore for flush in processor2024
Loosely-coupled slice target file data2024
Dependency skipping in a load-compare-jump sequence of instructions by incorpora2024
Inferring future value for speculative branch resolution in a microprocessor2024
Prioritization of threads in a simultaneous multithreading processor core2023