Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12408407 | Metal oxide semiconductor with multiple drain vias | Chih-Hung Chang, CHI-HSUEH LI | 2025-09-02 |
| 12288737 | Thin semiconductor packaging unit having a plurality of bridging layers | CHI-HSUEH LI | 2025-04-29 |
| 12224228 | Packaged component with composite pin structure and manufacturing method thereof | Yung-Hui Wang, CHI-HSUEH LI | 2025-02-11 |
| 12148675 | Power semiconductor package unit of surface mount technology including a plastic film covering a chip | Wei-Ming Hung, Wen-Liang Huang, Shun-Chi Shen, Chien-Chun Wang, CHI-HSUEH LI | 2024-11-19 |
| 11916030 | Method for manufacturing side wettable package | CHI-HSUEH LI | 2024-02-27 |
| 11848254 | Method for manufacturing a semiconductor package having a conductive pad with an anchor flange | CHI-HSUEH LI | 2023-12-19 |
| 11664345 | Semiconductor package element | Chih-Hung Chang, CHI-HSUEH LI | 2023-05-30 |
| 11594425 | Semiconductor package structure and fabricating method of the same | CHI-HSUEH LI | 2023-02-28 |
| 11562947 | Semiconductor package having a conductive pad with an anchor flange | CHI-HSUEH LI | 2023-01-24 |
| 11387203 | Side wettable package | CHI-HSUEH LI | 2022-07-12 |
| 11049781 | Chip-scale package device | — | 2021-06-29 |
| 10825781 | Semiconductor device with conductive film shielding | Chia-Hao Kang | 2020-11-03 |
| 10390440 | Solderless inter-component joints | Tsung Nan Lo | 2019-08-20 |
| 10211071 | IC packaging method and a packaged IC device | Wen-Hsuan Lin | 2019-02-19 |
| 10192837 | Multi-via redistribution layer for integrated circuits having solder balls | Wayne Hsiao, Richard Te Gan, James Spehar | 2019-01-29 |
| 10177021 | Integrated circuits and methods therefor | Wen-Hsuan Lin, Ju-Hsuan Ko, Chih-Hung Chang | 2019-01-08 |
| 10008454 | Wafer level package with EMI shielding | — | 2018-06-26 |
| 9892989 | Wafer-level chip scale package with side protection | Wen-Hsuan Lin | 2018-02-13 |