Issued Patents All Time
Showing 26–50 of 101 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7529844 | Multiprocessing systems employing hierarchical spin locks | Zoran Radovic | 2009-05-05 |
| 7509460 | DRAM remote access cache in local memory in a distributed shared memory system | Hakan Zeffer, Anders Landin | 2009-03-24 |
| 7412567 | Value-based memory coherence support | Hakan Zeffer, Anders Landin, Shailender Chaudhry, Paul N. Loewenstein, Robert E. Cypher +1 more | 2008-08-12 |
| 7373461 | Speculative directory lookup for sharing classification | Hakan Zeffer | 2008-05-13 |
| 7363462 | Performing virtual to global address translation in processing subsystem | Anders Landin | 2008-04-22 |
| 7360056 | Multi-node system in which global address generated by processing subsystem includes global to local translation information | Robert E. Cypher, Anders Landin | 2008-04-15 |
| 7237068 | Computer system employing bundled prefetching and null-data packet transmission | Dan Wallin | 2007-06-26 |
| 7165146 | Multiprocessing computer system employing capacity prefetching | Dan Wallin | 2007-01-16 |
| 7120756 | Computer system including a promise array | Robert E. Cypher, Anders Landin | 2006-10-10 |
| 7080213 | System and method for reducing shared memory write overhead in multiprocessor systems | Oskar Grenholm, Zoran Radovic | 2006-07-18 |
| 6985984 | Multiprocessing systems employing hierarchical back-off locks | Zoran Radovic | 2006-01-10 |
| 6826660 | Hierarchical SMP computer system | Mark D. Hill | 2004-11-30 |
| 6772244 | Queuing delay limiter | Hien Nguyen, Don M. Morrier, Monica C. Wong-Chan | 2004-08-03 |
| 6760786 | Multiprocessing system configured to perform efficient block copy operations | — | 2004-07-06 |
| 6654866 | Skewed finite hashing function | Mark D. Hill | 2003-11-25 |
| 6618799 | Selective address translation in coherent memory replication | — | 2003-09-09 |
| 6578071 | Repeater for use in a shared memory computing system | Mark D. Hill | 2003-06-10 |
| 6578033 | System and method for accessing a shared computer resource using a lock featuring different spin speeds corresponding to multiple states | Ashok Singhal | 2003-06-10 |
| 6574659 | Methods and apparatus for a directory-less memory access protocol in a distributed shared memory computer system | Mark D. Hill | 2003-06-03 |
| 6536000 | Communication error reporting mechanism in a multiprocessing computer system | Christopher J. Jackson | 2003-03-18 |
| 6496854 | Hybrid memory access protocol in a distributed shared memory computer system | Mark D. Hill | 2002-12-17 |
| 6449700 | Multiprocessing computer system employing a cluster protection mechanism | Christopher J. Jackson, Aleksandr Guzovskiy, William A. Nesheim | 2002-09-10 |
| 6446185 | Selective address translation in coherent memory replication | — | 2002-09-03 |
| 6401174 | Multiprocessing computer system employing a cluster communication error reporting mechanism | Christopher J. Jackson, Aleksandr Guzovskiy, William A. Nesheim | 2002-06-04 |
| 6377980 | Methods and apparatus for a directory-less memory access protocol in a distributed shared memory computer system | Mark D. Hill | 2002-04-23 |