Issued Patents All Time
Showing 51–75 of 101 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6370585 | Multiprocessing computer system employing a cluster communication launching and addressing mechanism | Christopher J. Jackson | 2002-04-09 |
| 6351795 | Selective address translation in coherent memory replication | — | 2002-02-26 |
| 6332165 | Multiprocessor computer system employing a mechanism for routing communication traffic through a cluster node having a slice of memory directed for pass through transactions | Christopher J. Jackson, Hien Nguyen | 2001-12-18 |
| 6332169 | Multiprocessing system configured to perform efficient block copy operations | — | 2001-12-18 |
| 6308246 | Skewed finite hashing function | Mark D. Hill | 2001-10-23 |
| 6243742 | Hybrid memory access protocol in a distributed shared memory computer system | Mark D. Hill | 2001-06-05 |
| 6240501 | Cache-less address translation | — | 2001-05-29 |
| 6226671 | Shared memory system for symmetric multiprocessor systems | Mark D. Hill | 2001-05-01 |
| 6148300 | Hybrid queue and backoff computer resource lock featuring different spin speeds corresponding to multiple-states | Ashok Singhal | 2000-11-14 |
| 6141692 | Directory-based, shared-memory, scaleable multiprocessor computer system having deadlock-free transaction flow sans flow control protocol | Paul N. Loewenstein | 2000-10-31 |
| 6078996 | Method for increasing the speed of data processing in a computer system | — | 2000-06-20 |
| 5987549 | Method and apparatus providing short latency round-robin arbitration for access to a shared resource | Ashok Singhal | 1999-11-16 |
| 5983326 | Multiprocessing system including an enhanced blocking mechanism for read-to-share-transactions in a NUMA mode | Paul N. Loewenstein | 1999-11-09 |
| 5978874 | Implementing snooping on a split-transaction computer system bus | Ashok Singhal, Bjorn O. Liencres, Jeff Price, Frederick M. Cerauskis, David J. Broniarczyk +2 more | 1999-11-02 |
| 5960179 | Method and apparatus extending coherence domain beyond a computer system bus | — | 1999-09-28 |
| 5958019 | Multiprocessing system configured to perform synchronization operations | Robert C. Zak, Shaw-Wen Yang, Aleksandr Guzovskiy, William A. Nesheim, Monica C. Wong-Chan +1 more | 1999-09-28 |
| 5950226 | Multiprocessing system employing a three-hop communication protocol | Paul N. Loewenstein | 1999-09-07 |
| 5940860 | Methods and apparatus for substantially memory-less coherence transformer for connecting computer node coherence domains | Mark D. Hill, David A. Wood | 1999-08-17 |
| 5926829 | Hybrid NUMA COMA caching system and methods for selecting between the caching modes | Robert C. Zak | 1999-07-20 |
| 5923847 | Split-SMP computer system configured to operate in a protected mode having repeater which inhibits transaction to local address partiton | Mark D. Hill | 1999-07-13 |
| 5911052 | Split transaction snooping bus protocol | Ashok Singhal, Bjorn O. Liencres, Jeff Price, Frederick M. Cerauskis, David J. Broniarczyk +2 more | 1999-06-08 |
| 5903907 | Skip-level write-through in a multi-level memory of a computer system | Mark D. Hill | 1999-05-11 |
| 5897657 | Multiprocessing system employing a coherency protocol including a reply count | Paul N. Loewenstein | 1999-04-27 |
| 5893149 | Flushing of cache memory in a computer system | Aleksandr Guzovskiy | 1999-04-06 |
| 5893144 | Hybrid NUMA COMA caching system and methods for selecting between the caching modes | David A. Wood | 1999-04-06 |