Erik E. Hagersten — 101 Patents at Oracle

Erik E. Hagersten has been granted 101 US patents while listed as an inventor at Oracle. The first was granted in 1998 and the most recent in March 2023. Erik E. Hagersten ranks #14,231 of 4,157,543 US inventors in our database (top 0.34%). Patent records list Erik E. Hagersten in Uppsala, CA, SE.

Issued Patents All Time

Showing 1–25 of 101 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
11615026	Systems and methods for implementing coherent memory in a multiprocessor system	Andreas Sembrant, David Black-Schaffer	2023-03-28
11354242	Efficient early ordering mechanism	Andreas Sembrant	2022-06-07
11237969	Systems and methods for implementing coherent memory in a multiprocessor system	Andreas Sembrant, David Black-Schaffer	2022-02-01
11138121	Systems and methods for efficient cacheline handling based on predictions	Andreas Sembrant, David Black-Schaffer	2021-10-05
11023376	System and methods for efficient virtually-tagged cache implementation	—	2021-06-01
10915466	System protecting caches from side-channel attacks	David Black-Schaffer, Stefanos Kaxiras	2021-02-09
10884925	Systems and methods for tag-less buffer implementation	Andreas Sembrant	2021-01-05
10866891	Systems and methods for efficient compressed cache line storage and handling	Andreas Sembrant, David Black-Schaffer	2020-12-15
10754777	Systems and methods for implementing coherent memory in a multiprocessor system	Andreas Sembrant, David Black-Schaffer	2020-08-25
10713166	Efficient early ordering mechanism	Andreas Sembrant	2020-07-14
10671543	Systems and methods for reducing first level cache energy by eliminating cache address tags	Andreas Sembrant, David Black-Schaffer, Stefanos Kaxiras	2020-06-02
10409725	Management of shared pipeline resource usage based on level information	Andreas Sembrant, David Black-Schaffer, Stafanos Kaxiras	2019-09-10
10402331	Systems and methods for implementing a tag-less shared cache and a larger backing cache	Andreas Sembrant, David Black-Schaffer, Stefanos Kaxiras	2019-09-03
10402344	Systems and methods for direct data access in multi-level cache memory hierarchies	Andreas Sembrant, David Black-Schaffer, Stefanos Kaxiras	2019-09-03
10031849	Tracking alternative cacheline placement locations in a cache hierarchy	Andreas Sembrant, David Black-Schaffer	2018-07-24
10019368	Placement policy for memory hierarchies	Andreas Sembrant, David Black-Schaffer	2018-07-10
8539455	System for and method of capturing performance characteristics data from a computer system and modeling target system performance	Erik Berg, Hakan Zeffer, Magnus Vesterlund, Mats Nilsson, Mikael Petterson	2013-09-17
8443341	System for and method of capturing application characteristics data from a computer system and modeling target system	Erik Berg, Mats Nilsson, Mikael Petterson, Magnus Vesterlund, Hakan Zeffer	2013-05-14
8141058	System for and method of capturing application characteristics data from a computer system and modeling target system	Erik Berg, Mats Nilsson, Mikael Petterson, Magnus Vesterlund, Hakan Zeffer	2012-03-20
8024526	Multi-node system with global access states	Anders Landin, Robert E. Cypher	2011-09-20	$28,688,000
8010749	Multi-node computer system with proxy transaction to read data from a non-owning memory device	Anders Landin, Robert E. Cypher	2011-08-30	$62,195,000
7945738	Multi-node computer system employing a reporting mechanism for multi-node transactions	Anders Landin	2011-05-17	$27,891,000
7765381	Multi-node system in which home memory subsystem stores global to local address translation information for replicating nodes	Anders Landin	2010-07-27	$25,850,000
7606978	Multi-node computer system implementing global access state dependent transactions	Anders Landin, Robert E. Cypher	2009-10-20	$11,203,000
7529893	Multi-node system with split ownership and access right coherence mechanism	Anders Landin, Robert E. Cypher	2009-05-05	$16,300,000

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Erik E. Hagersten — 101 Patents

Issued Patents All Time

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