Issued Patents All Time
Showing 51–58 of 58 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6633967 | Coherent translation look-aside buffer | — | 2003-10-14 |
| 6353877 | Performance optimization and system bus duty cycle reduction by I/O bridge partial cache line write | Glenn Arthur Herdeg, Ricky C. Hetherington, Craig D. Keefer, Maurice B. Steinman, Paul Michael Guglielmi | 2002-03-05 |
| 6128711 | Performance optimization and system bus duty cycle reduction by I/O bridge partial cache line writes | Glenn Arthur Herdeg, Ricky C. Hetherington, Craig D. Keefer, Maurice B. Steinman, Paul Michael Guglielmi | 2000-10-03 |
| 6021456 | Method for communicating interrupt data structure in a multi-processor computer system | Glenn Arthur Herdeg, David T. Mayo, Dennis F. Hayes | 2000-02-01 |
| 6012120 | Method and apparatus for providing DMA transfers between devices coupled to different host bus bridges | Craig D. Keefer, Thomas Adam McLaughlin, Paul Michael Guglielmi | 2000-01-04 |
| 5953538 | Method and apparatus providing DMA transfers between devices coupled to different host bus bridges | Craig D. Keefer, Thomas Adam McLaughlin, Paul Michael Guglielmi | 1999-09-14 |
| 5822195 | Interface that permits data bus signals to pass between high frequency processing unit and low frequency expansion devices | Colin E. Brench, Stephen Richard Coe, Stephen Lindquist, Richard E. Olson | 1998-10-13 |
| 5481555 | System and method for error detection and reducing simultaneous switching noise | Paul Wade, Donald W. Smelser | 1996-01-02 |