Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11210576 | Device for applying to packaging | Geoffrey Wyman Blake, Hugo John Martin Vincent, Amyas Edward Wykes Phillips, Richard William Earnshaw | 2021-12-28 |
| 7487367 | Apparatus and method for managing access to a memory | Lionel Belnet, Nicolas Chaussade, Simon Charles Watt | 2009-02-03 |
| 7305534 | Control of access to a memory by a device | Simon Charles Watt, Lionel Belnet, David Hennah Mansell, Nicolas Chaussade | 2007-12-04 |
| 7213095 | Bus transaction management within data processing systems | David John Gwilt, Ian Victor Devereux, Bruce James Mathewson, Antony John Harris, Richard Roy Grisenthwaite | 2007-05-01 |
| 7171539 | Apparatus and method for controlling access to a memory | David Hennah Mansell, Michael Robert Nonweiler | 2007-01-30 |
| 6826670 | Accessing memory units in a data processing apparatus | David Michael Bull, Gary L. Campbell | 2004-11-30 |
| 6721861 | Indicator of validity status information for data storage within a data processing system | David Michael Bull | 2004-04-13 |
| 6564301 | Management of caches in a data processing apparatus | — | 2003-05-13 |
| 6532553 | Debugging data processing systems | David John Gwilt, Andrew Christopher Rose, David Michael Bull | 2003-03-11 |
| 6366978 | Cache memory | Michael Thomas Kilpatrick | 2002-04-02 |
| 6353879 | Memory address translation in a data processing system | David Michael Bull | 2002-03-05 |
| 6259459 | Apparatus and method for image data processing of pixel data in raster lines | — | 2001-07-10 |
| 6101573 | Bit line and/or match line partitioned content addressable memory | John S. Kelly, Michael Thomas Kilpatrick, Mark Silla | 2000-08-08 |
| 5860102 | Cache memory circuit | — | 1999-01-12 |