Issued Patents All Time
Showing 26–50 of 62 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9639487 | Managing cache memory in a parallel processing environment | David Wentzlaff, Anant Agarwal | 2017-05-02 |
| 9514050 | Caching in multicore and multiprocessor architectures | Anant Agarwal, Ian Rudolf Bratt | 2016-12-06 |
| 9507745 | Low latency dynamic route selection | Ian Rudolf Bratt, Carl Ramey | 2016-11-29 |
| 9479431 | Route prediction in packet switched networks | Ian Rudolf Bratt, Carl Ramey | 2016-10-25 |
| 9424228 | High performance, scalable multi chip interconnect | Carl Ramey | 2016-08-23 |
| 9298618 | Managing cache memory in a parallel processing environment | David Wentzlaff, Anant Agarwal | 2016-03-29 |
| 9135215 | Route prediction in packet switched networks | Ian Rudolf Bratt, Carl Ramey | 2015-09-15 |
| 8934347 | Low latency dynamic route selection | Ian Rudolf Bratt, Carl Ramey | 2015-01-13 |
| 8738860 | Computing in parallel processing environments | Patrick Robert Griffin, Mathew Hostetter, Anant Agarwal, Chyi-Chang Miao, Christopher D. Metcalf +15 more | 2014-05-27 |
| 8677081 | Transferring and storing data in multicore and multiprocessor architectures | David Wentzlaff, Anant Agarwal | 2014-03-18 |
| 8631205 | Managing cache memory in a parallel processing environment | David Wentzlaff, Anant Agarwal | 2014-01-14 |
| 8572353 | Condensed router headers with low latency output port calculation | Ian Rudolf Bratt, Carl Ramey | 2013-10-29 |
| 8560780 | Caching in multicore and multiprocessor architectures | Anant Agarwal, Ian Rudolf Bratt | 2013-10-15 |
| 8234451 | Caching in multicore and multiprocessor architectures | Anant Agarwal, Ian Rudolf Bratt | 2012-07-31 |
| 8209490 | Protocol for maintaining cache coherency in a CMP | George Z. Chrysos | 2012-06-26 |
| 8200901 | Managing cache memory in a parallel processing environment | David Wentzlaff, Anant Agarwal | 2012-06-12 |
| 8117392 | Method and apparatus for efficient ordered stores over an interconnection network | Mark J. Charney, Ravi Rajwar, Pritpal S. Ahuja | 2012-02-14 |
| 8112581 | Caching in multicore and multiprocessor architectures | Anant Agarwal, Ian Rudolf Bratt | 2012-02-07 |
| 7987321 | Caching in multicore and multiprocessor architectures | Anant Agarwal, Ian Rudolf Bratt | 2011-07-26 |
| 7882307 | Managing cache memory in a parallel processing environment | David Wentzlaff, Anant Agarwal | 2011-02-01 |
| 7853752 | Caching in multicore and multiprocessor architectures | Anant Agarwal | 2010-12-14 |
| 7853754 | Caching in multicore and multiprocessor architectures | Anant Agarwal, Ian Rudolf Bratt | 2010-12-14 |
| 7853755 | Caching in multicore and multiprocessor architectures | Anant Agarwal, Ian Rudolf Bratt | 2010-12-14 |
| 7805575 | Caching in multicore and multiprocessor architectures | Anant Agarwal, Ian Rudolf Bratt | 2010-09-28 |
| 7805577 | Managing memory access in a parallel processing environment | David Wentzlaff, Anant Agarwal | 2010-09-28 |