DW

David Wentzlaff

TI Tilera: 27 patents #2 of 28Top 8%
MIT: 5 patents #953 of 9,367Top 15%
NV NVIDIA: 4 patents #1,685 of 7,811Top 25%
PU Princeton University: 1 patents #543 of 1,197Top 50%
Overall (All Time): #90,039 of 4,157,543Top 3%
37
Patents All Time

Issued Patents All Time

Showing 25 most recent of 37 patents

Patent #TitleCo-InventorsDate
11151033 Cache coherency in multiprocessor system Matthew Mattina, Anant Agarwal 2021-10-19
11043259 System and method for in-memory compute Fei Gao, Georgios Tziantzioulis 2021-06-22
10642772 Flow control in a parallel processing environment 2020-05-05
10013391 Architecture emulation in a parallel processing environment Anant Agarwal 2018-07-03
10002096 Flow control in a parallel processing environment 2018-06-19
9934010 Programming in a multiprocessor environment Patrick Robert Griffin, Walter Lee, Anant Agarwal 2018-04-03
9639487 Managing cache memory in a parallel processing environment Matthew Mattina, Anant Agarwal 2017-05-02
9329798 Flow control in a parallel processing environment 2016-05-03
9298618 Managing cache memory in a parallel processing environment Matthew Mattina, Anant Agarwal 2016-03-29
9009660 Programming in a multiprocessor environment Patrick Robert Griffin, Walter Lee, Anant Agarwal 2015-04-14
8738860 Computing in parallel processing environments Patrick Robert Griffin, Mathew Hostetter, Anant Agarwal, Chyi-Chang Miao, Christopher D. Metcalf +15 more 2014-05-27
8677081 Transferring and storing data in multicore and multiprocessor architectures Matthew Mattina, Anant Agarwal 2014-03-18
8635378 Flow control in a parallel processing environment 2014-01-21
8631205 Managing cache memory in a parallel processing environment Matthew Mattina, Anant Agarwal 2014-01-14
8516222 Virtual architectures in a parallel processing environment Anant Agarwal 2013-08-20
8200901 Managing cache memory in a parallel processing environment Matthew Mattina, Anant Agarwal 2012-06-12
8190855 Coupling data for interrupt processing in a parallel processing environment Carl Ramey, Anant Agarwal 2012-05-29
8127111 Managing data provided to switches in a parallel processing environment Anant Agarwal 2012-02-28
8078832 Virtual architectures in a parallel processing environment Anant Agarwal 2011-12-13
8046563 Virtual architectures in a parallel processing environment Anant Agarwal 2011-10-25
8018849 Flow control in a parallel processing environment 2011-09-13
7882307 Managing cache memory in a parallel processing environment Matthew Mattina, Anant Agarwal 2011-02-01
7853774 Managing buffer storage in a parallel processing environment 2010-12-14
7814242 Managing data flows in a parallel processing environment 2010-10-12
7805577 Managing memory access in a parallel processing environment Matthew Mattina, Anant Agarwal 2010-09-28