Issued Patents All Time
Showing 26–50 of 149 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7929262 | Method and structure for avoiding hot carrier degradation and soft leakage damage to ESD protection circuit | Peter J. Hopper, Ann Concannon | 2011-04-19 |
| 7915678 | Snapback capable NLDMOS, DMOS and extended voltage NMOS devices | — | 2011-03-29 |
| 7911869 | Fuse-type memory cells based on irreversible snapback device | Peter J. Hopper, Yuri Mirgorodski | 2011-03-22 |
| 7910950 | High voltage ESD LDMOS-SCR with gate reference voltage | Peter J. Hopper | 2011-03-22 |
| 7910951 | Low side zener reference voltage extended drain SCR clamps | — | 2011-03-22 |
| 7839242 | Magnetic MEMS switching regulator | Peter J. Hopper, Trevor Niblock, Peter Johnson | 2010-11-23 |
| 7800127 | ESD protection device with controllable triggering characteristics using driver circuit related to power supply | Alexander Burinskiy, Peter J. Hopper, Vladimir Kuznetsov | 2010-09-21 |
| 7795102 | ESD high frequency diodes | Vladimir Kuznetsov, Peter J. Hopper | 2010-09-14 |
| 7794510 | On chip battery | Peter J. Hopper, William French, Robert Drury | 2010-09-14 |
| 7795047 | Current balancing in NPN BJT and BSCR snapback devices | Peter J. Hopper | 2010-09-14 |
| 7754540 | Method of forming a SiGe DIAC ESD protection structure | Peter J. Hopper | 2010-07-13 |
| 7754505 | Method of forming a silicon-based light-emitting structure | Peter J. Hopper, Philipp Lindorfer, William French | 2010-07-13 |
| 7718480 | ESD clamps and NMOS arrays with increased electrical overstress robustness | Marcel ter Book, Peter J. Hopper | 2010-05-18 |
| 7714355 | Method of controlling the breakdown voltage of BSCRs and BJT clamps | Alexei Sadovnikov, Peter J. Hopper, Andy Strachan | 2010-05-11 |
| 7705403 | Programmable ESD protection structure | Yuri Mirgorodski, Peter J. Hopper | 2010-04-27 |
| 7651897 | Integrated circuit with metal heat flow path coupled to transistor and method for manufacturing such circuit | Peter J. Hopper, Yuri Mirgorodski | 2010-01-26 |
| 7651913 | Method of forming non-volatile memory (NVM) retention improvement utilizing protective electrical shield | Yuri Mirgorodski, Peter J. Hopper | 2010-01-26 |
| 7639464 | High holding voltage dual direction ESD clamp | Peter J. Hopper | 2009-12-29 |
| 7635614 | Double gate NLDMOS SCR device with controllable switching characteristics | Vladimir Kuznetsov, Peter J. Hopper | 2009-12-22 |
| 7528012 | Method for forming heat sinks on silicon on insulator wafers | Peter J. Hopper, Iouri Mirgorodski, Peter Johnson | 2009-05-05 |
| 7521310 | Vertical thyristor in complementary SiGe bipolar process | Alexel Sadovnikov, Peter J. Hopper | 2009-04-21 |
| 7514751 | SiGe DIAC ESD protection structure | Peter J. Hopper | 2009-04-07 |
| 7479435 | Method of forming a circuit having subsurface conductors | Peter J. Hopper, Philipp Lindorfer, Andy Strachan | 2009-01-20 |
| 7462874 | Silicon-based light-emitting structure | Peter J. Hopper, Philipp Lindorfer, William French | 2008-12-09 |
| 7435628 | Method of forming a vertical MOS transistor | Peter J. Hopper, Yuri Mirgorodski, Peter Johnson | 2008-10-14 |