Issued Patents All Time
Showing 25 most recent of 42 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12277002 | Low-latency retimer with seamless clock switchover | Subbarao Arumilli, Charan Enugala, Chi Feng, Ken (Keqin) Han, Pulkit Khandelwal +4 more | 2025-04-15 |
| 12277350 | Virtual metadata storage | Justina Provine, Anh T. Tran, Ken (Keqin) Han, Enrique Musoll | 2025-04-15 |
| 12143288 | Low-latency signaling-link retimer | Casey Morrison, Enrique Musoll, Pulkit Khandelwal, Subbarao Arumilli, Vikas Khandelwal +4 more | 2024-11-12 |
| 11853115 | Low-latency retimer with seamless clock switchover | Subbarao Arumilli, Charan Enugala, Chi Feng, Ken (Keqin) Han, Pulkit Khandelwal +4 more | 2023-12-26 |
| 11487317 | Low-latency retimer with seamless clock switchover | Subbarao Arumilli, Charan Enugala, Chi Feng, Ken (Keqin) Han, Pulkit Khandelwal +4 more | 2022-11-01 |
| 11327913 | Configurable-aggregation retimer with media-dedicated controllers | Casey Morrison, Charan Enugala, Chi Feng, Enrique Musoll, Ken (Keqin) Han +4 more | 2022-05-10 |
| 11258696 | Low-latency signaling-link retimer | Casey Morrison, Enrique Musoll, Pulkit Khandelwal, Subbarao Arumilli, Vikas Khandelwal +4 more | 2022-02-22 |
| 11150687 | Low-latency retimer with seamless clock switchover | Subbarao Arumilli, Charan Enugala, Chi Feng, Ken (Keqin) Han, Pulkit Khandelwal +4 more | 2021-10-19 |
| 8873592 | System and method for adding a low data rate data channel to a 100Base-T ethernet link | — | 2014-10-28 |
| 8638125 | Low voltage differential signal driver with reduced power consumption | Khaldoon S. Abugharbieh, Ivan Duzevik | 2014-01-28 |
| 7800411 | System and method for providing a strobed comparator with reduced offset and reduced charge kickback | — | 2010-09-21 |
| 7630422 | Driver for vertical-cavity surface-emitting laser and method | Ramsin M. Ziazadeh | 2009-12-08 |
| 7502568 | Method of using low bandwidth sensor for measuring high frequency AC modulation amplitude | — | 2009-03-10 |
| 7477077 | Apparatus and method for loss of signal detection in a receiver | Arlo Aude, Ivan Duzevik | 2009-01-13 |
| 7474133 | Apparatus and method for high-speed serial communications | Arlo Aude, Ivan Duzevik | 2009-01-06 |
| 7432575 | Two-layer electrical substrate for optical devices | Neeraj Pendse, Jia Liu, Bruce Carlton Roberts, Luu Thanh Nguyen, William Paul Mazotti | 2008-10-07 |
| 7395286 | Method for generating non-overlapping N-phases of divide-by-N clocks with precise 1/N duty ratio using a shift register | Yongseon Koh | 2008-07-01 |
| 7333521 | Method of sensing VCSEL light output power by monitoring electrical characteristics of the VCSEL | — | 2008-02-19 |
| 7224189 | AC/DC coupling input network with low-power common-mode correction for current-mode-logic drivers | Ramsin M. Ziazadeh | 2007-05-29 |
| 7209007 | Combined analog signal gain controller and equalizer | Abu-Hena Mostafa Kamal, Yongseon Koh | 2007-04-24 |
| 7209006 | Differential amplifier with increased common mode loop gain at low frequencies | — | 2007-04-24 |
| 7107380 | Configuration for dockable portable computers using a single ethernet physical layer chip and transformer | — | 2006-09-12 |
| 7098540 | Electrical interconnect with minimal parasitic capacitance | Luu Thanh Nguyen, Alan Erik Segervall, Stephen Gee | 2006-08-29 |
| 6970048 | Inductive-capacitive (LC) based quadrature voltage controlled oscillator (VCO) with deterministic quadrature signal phase relationship | Varadarajan Devnath, Quyet Nguyen, Yongseon Koh | 2005-11-29 |
| 6950490 | Fault state detection mechanism for a ring-counter-based frequency divider-by-N that generates non-overlapping N-phases of divide-by-N clocks with 1/N duty ratio | Yongseon Koh | 2005-09-27 |