Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7115449 | Method for fabrication of polycrystalline silicon thin film transistors | Tien-Fu Chen, Jen-Chung Lou | 2006-10-03 |
| 7109075 | Method for fabrication of polycrystallin silicon thin film transistors | Tien-Fu Chen, Jen-Chung Lou | 2006-09-19 |
| 6903029 | Method of reducing thick film stress of spin-on dielectric and the resulting sandwich dielectric structure | Yueh-Chuan Lee, Chih-Chuan Hsu, Kwo-Hau Wu, Shuo Wang | 2005-06-07 |
| 6774461 | Method of reducing thick film stress of spin-on dielectric and the resulting sandwich dielectric structure | Yueh-Chuan Lee, Chih-Chuan Hsu, Kwo-Hau Wu, Shuo Wang | 2004-08-10 |
| 6653245 | Method for liquid phase deposition | Muh-Wang Liang, Pang-Min Chiang, Chen Max, Jen-Rong Huang | 2003-11-25 |
| 6486057 | Process for preparing Cu damascene interconnection | Yueh-Chuan Lee, Chien-Hsing Lin | 2002-11-26 |
| 6294832 | Semiconductor device having structure of copper interconnect/barrier dielectric liner/low-k dielectric trench and its fabrication method | Yueh-Chuan Lee, Kwo-Hau Wu, Yuh-Ching Su | 2001-09-25 |
| 6251753 | Method of sidewall capping for degradation-free damascene trenches of low dielectric constant dielectric by selective liquid-phase deposition | Yueh-Chuan Lee, Yuh-Ching Su, Kwo-Hau Wu | 2001-06-26 |
| 6087276 | Method of making a TFT having an ion plated silicon dioxide capping layer | Tai-Ju Chen, Jiann-Shiun Kao | 2000-07-11 |
| 6039857 | Method for forming a polyoxide film on doped polysilicon by anodization | Jeng-Shu Liu | 2000-03-21 |
| 5776835 | Method of making a grooved gate structure of semiconductor device | Jwinn Lein Su | 1998-07-07 |
| 5661051 | Method for fabricating a polysilicon transistor having a buried-gate structure | Jyh-Nan Jeng | 1997-08-26 |
| 5648128 | Method for enhancing the growth rate of a silicon dioxide layer grown by liquid phase deposition | Tso-Hung Fan | 1997-07-15 |
| 5614270 | Method of improving electrical characteristics of a liquid phase deposited silicon dioxide film by plasma treatment | Shyue-Shyh Lin | 1997-03-25 |
| 5057445 | Method of making a high-voltage, low on-resistance IgFET | Yuji Yatsuda | 1991-10-15 |
| 4961101 | Semiconductor MOSFET device with offset regions | Yuji Yatsuda | 1990-10-02 |
| 4818719 | Method of manufacturing an integrated CMOS of ordinary logic circuit and of high voltage MOS circuit | Yasunao Misawa, Yuji Yatsuda | 1989-04-04 |