Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12431425 | Conductive structure and capacitor structure and method for manufacturing the same | Pin Li | 2025-09-30 |
| 12051719 | Method for manufacturing semiconductor structure with single side capacitor | Yu-Min Chou | 2024-07-30 |
| 12021114 | Semiconductor structure with single side capacitor | Yu-Min Chou | 2024-06-25 |
| 11211351 | Apparatuses including redistribution layers and related microelectronic devices | Yi-Jen Lo | 2021-12-28 |
| 10903103 | Front opening unified pod | — | 2021-01-26 |
| 10825722 | Method of manufacturing a semiconductor structure | — | 2020-11-03 |
| 10679958 | Methods of manufacturing a multi-device package | Yi-Jen Lo | 2020-06-09 |
| 10593637 | Multi-device packages and related microelectronic devices | Yi-Jen Lo | 2020-03-17 |
| 10566332 | Semiconductor devices | Kuo-Chen Wang, Lars Heineck, Sanh D. Tang | 2020-02-18 |
| 10381302 | Semiconductor package with embedded MIM capacitor, and method of fabricating thereof | Shing-Yih Shih, Tieh-Chiang Wu | 2019-08-13 |
| 10373922 | Methods of manufacturing a multi-device package | Yi-Jen Lo | 2019-08-06 |
| 10163909 | Methods for fabricating a semiconductor memory device | Kuo-Chen Wang, Lars Heineck, Sanh D. Tang | 2018-12-25 |
| 9881924 | Semiconductor memory device having coplanar digit line contacts and storage node contacts in memory array and method for fabricating the same | Kuo-Chen Wang, Lars Heineck, Sanh D. Tang | 2018-01-30 |
| 9543270 | Multi-device package and manufacturing method thereof | Yi-Jen Lo | 2017-01-10 |
| 9455243 | Silicon interposer and fabrication method thereof | Neng-Tai Shih | 2016-09-27 |
| 8384191 | Stack capacitor structure and forming method | — | 2013-02-26 |
| 7749856 | Method of fabricating storage node with supported structure of stacked capacitor | Le-Tien Jung | 2010-07-06 |
| 7358576 | Word line structure with single-sided partially recessed gate structure | Kuo-Chien Wu | 2008-04-15 |
| 6991978 | World line structure with single-sided partially recessed gate structure | Kuo-Chien Wu | 2006-01-31 |
| 6972248 | Method of fabricating semiconductor device | Sweehan J. H. Yang, Kuo-Chien Wu | 2005-12-06 |
| 6960503 | Method for fabricating a trench capacitor | Ping Hsu, Kuo-Chien Wu | 2005-11-01 |
| 6943099 | Method for manufacturing gate structure with sides of its metal layer partially removed | Kuo-Chien Wu | 2005-09-13 |
| 6933229 | Method of manufacturing semiconductor device featuring formation of conductive plugs | Kuo-Chien Wu | 2005-08-23 |
| 6930043 | Method for forming DRAM cell bit line and bit line contact structure | Kuo-Chien Wu | 2005-08-16 |