Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6214630 | Wafer level integrated circuit structure and method of manufacturing the same | Min-Chih Hsuan, Charlie Han | 2001-04-10 |
| 5749090 | Cache tag RAM having separate valid bit array with multiple step invalidation and method therefor | Donovan Raatz | 1998-05-05 |
| 5546355 | Integrated circuit memory having a self-timed write pulse independent of clock frequency and duty cycle | Donovan Raatz | 1996-08-13 |
| 5497347 | BICMOS cache TAG comparator having redundancy and separate read an compare paths | — | 1996-03-05 |
| 5497106 | BICMOS output buffer circuit having overshoot protection | Donovan Raatz, Alan R. Bormann | 1996-03-05 |
| 5293081 | Driver circuit for output buffers | Jennifer Chiao, Stephen T. Flannagan | 1994-03-08 |
| 5291455 | Memory having distributed reference and bias voltages | John D. Porter, Jennifer Chiao | 1994-03-01 |
| 5287314 | BICMOS sense amplifier with reverse bias protection | Stephen T. Flannagan | 1994-02-15 |
| 5184033 | Regulated BiCMOS output buffer | Jennifer Chiao, Stephen T. Flannagan | 1993-02-02 |
| 5043943 | Cache memory with a parity write control circuit | Richard Dewitt Crisp, Jennifer Chiao | 1991-08-27 |
| 4958086 | Low di/dt output buffer with improved speed | Karl L. Wang | 1990-09-18 |